PIC12F508/509/16F505
The PIC12F508/509/16F505 devices have a Watchdog
Timer, which can be shut off only through configuration
bit WDTE. It runs off of its own RC oscillator for added
reliability. If using HS (PIC16F505), XT or LP selectable
oscillator options, there is always an 18 ms (nominal)
delay provided by the Device Reset Timer (DRT),
intended to keep the chip in Reset until the crystal
oscillator is stable. If using INTRC or EXTRC, there is
an 18 ms delay only on VDD power-up. With this timer
on-chip, most applications need no external Reset
circuitry.
7.0
SPECIAL FEATURES OF THE
CPU
What sets a microcontroller apart from other proces-
sors are special circuits that deal with the needs of real-
time applications. The PIC12F508/509/16F505
microcontrollers have a host of such features intended
to maximize system reliability, minimize cost through
elimination of external components, provide power-
saving operating modes and offer code protection.
These features are:
The Sleep mode is designed to offer a very low current
Power-down mode. The user can wake-up from Sleep
through a change on input pins or through a Watchdog
Timer time-out. Several oscillator options are also
made available to allow the part to fit the application,
including an internal 4 MHz oscillator. The EXTRC
oscillator option saves system cost while the LP crystal
option saves power. A set of configuration bits are used
to select various options.
• Oscillator Selection
• Reset:
- Power-on Reset (POR)
- Device Reset Timer (DRT)
- Wake-up from Sleep on Pin Change
• Watchdog Timer (WDT)
• Sleep
• Code Protection
• ID Locations
7.1
Configuration Bits
• In-Circuit Serial Programming™
• Clock Out
The PIC12F508/509/16F505 Configuration Words
consist of 12 bits. Configuration bits can be
programmed to select various device configurations.
Three bits are for the selection of the oscillator type;
(two bits on the PIC12F508/509), one bit is the
Watchdog Timer enable bit, one bit is the MCLR enable
bit and one bit is for code protection (Register 7-1,
Register 7-2).
REGISTER 7-1:
CONFIGURATION WORD FOR PIC12F508/509(1)
—
—
—
—
—
—
—
MCLRE
CP
WDTE
FOSC1
FOSC0
bit 0
bit 11
bit 11-5
bit 4
Unimplemented: Read as ‘0’
MCLRE: GP3/MCLR Pin Function Select bit
1= GP3/MCLR pin function is MCLR
0= GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD
bit 3
CP: Code Protection bit
1= Code protection off
0= Code protection on
bit 2
WDTE: Watchdog Timer Enable bit
1= WDT enabled
0= WDT disabled
bit 1-0
FOSC<1:0>: Oscillator Selection bits
11= EXTRC = external selection bits
10= INTRC = internal RC oscillator
01= XT oscillator
00= LP oscillator
Note 1: Refer to the “PIC12F508/509 Memory Programming Specifications” (DS41227) to determine how to access
the Configuration Word. The Configuration Word is not user addressable during device operation.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared x = bit is unknown
© 2007 Microchip Technology Inc.
Preliminary
DS41236C-page 39