PIC12F508/509/16F505
EXAMPLE 6-1:
CHANGING PRESCALER
(TIMER0 → WDT)
;Clear WDT
6.2
Prescaler
An 8-bit counter is available as a prescaler for the
Timer0 module or as a postscaler for the Watchdog
Timer (WDT), respectively (see Section 7.6 “Watch-
dog Timer (WDT)”). For simplicity, this counter is
being referred to as “prescaler” throughout this data
sheet.
CLRWDT
CLRF
TMR0
;Clear TMR0 & Prescaler
MOVLW ‘00xx1111’b;These 3 lines (5, 6, 7)
OPTION
;are required only if
;desired
;PS<2:0> are 000 or 001
CLRWDT
MOVLW ‘00xx1xxx’b;Set Postscaler to
OPTION ;desired WDT rate
Note:
The prescaler may be used by either the
Timer0 module or the WDT, but not both.
Thus, a prescaler assignment for the
Timer0 module means that there is no
prescaler for the WDT and vice versa.
To change the prescaler from the WDT to the Timer0
module, use the sequence shown in Example 6-2. This
sequence must be used even if the WDT is disabled. A
CLRWDT instruction should be executed before
switching the prescaler.
The PSA and PS<2:0> bits (OPTION<3:0>) determine
prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,
BSF 1, x, etc.) will clear the prescaler. When assigned
to WDT, a CLRWDT instruction will clear the prescaler
along with the WDT. The prescaler is neither readable
nor writable. On a Reset, the prescaler contains all ‘0’s.
EXAMPLE 6-2:
CHANGING PRESCALER
(WDT → TIMER0)
;Clear WDT and
;prescaler
CLRWDT
MOVLW ‘xxxx0xxx’ ;Select TMR0, new
;prescale value and
;clock source
6.2.1
SWITCHING PRESCALER
ASSIGNMENT
OPTION
The prescaler assignment is fully under software
control (i.e., it can be changed “on-the-fly” during pro-
gram execution). To avoid an unintended device Reset,
the following instruction sequence (Example 6-1) must
be executed when changing the prescaler assignment
from Timer0 to the WDT.
DS41236C-page 36
Preliminary
© 2007 Microchip Technology Inc.