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PIC16C57C-04I/SO 参数 Datasheet PDF下载

PIC16C57C-04I/SO图片预览
型号: PIC16C57C-04I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ROM的8位CMOS微控制器系列 [ROM-Based 8-Bit CMOS Microcontroller Series]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 84 页 / 641 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16CR54C  
7.4  
Power-On Reset (POR)  
FIGURE 7-8: EXTERNAL POWER-ON  
RESET CIRCUIT (FOR SLOW  
VDD POWER-UP)  
The PIC16CR54C incorporates on-chip Power-On  
Reset (POR) circuitry which provides an internal chip  
reset for most power-up situations. To use this feature,  
the user merely ties the MCLR/VPP pin to VDD. A  
simplified block diagram of the on-chip Power-On  
Reset circuit is shown in Figure 7-7.  
VDD  
VDD  
D
R
R1  
MCLR  
The Power-On Reset circuit and the Device Reset  
Timer (Section 7.5) circuit are closely related. On  
power-up, the reset latch is set and the DRT is reset.  
The DRT timer begins counting once it detects MCLR  
to be high. After the time-out period, which is typically  
18 ms, it will reset the reset latch and thus end the  
on-chip reset signal.  
PIC16CR54C  
C
• External Power-On Reset circuit is required  
only if VDD power-up is too slow. The diode D  
helps discharge the capacitor quickly when  
VDD powers down.  
A power-up example where MCLR is not tied to VDD is  
shown in Figure 7-9. VDD is allowed to rise and  
stabilize before bringing MCLR high. The chip will  
actually come out of reset TDRT msec after MCLR  
goes high.  
• R < 40 kis recommended to make sure that  
voltage drop across R does not violate the  
device electrical specification.  
• R1 = 100to 1 kwill limit any current  
flowing into MCLR from external capacitor C  
in the event of MCLR pin breakdown due to  
Electrostatic Discharge (ESD) or Electrical  
Overstress (EOS).  
In Figure 7-10, the on-chip Power-On Reset feature is  
being used (MCLR and VDD are tied together). The  
VDD is stable before the start-up timer times out and  
there is no problem in getting a proper reset. However,  
Figure 7-11 depicts a problem situation where VDD  
rises too slowly. The time between when the DRT  
senses a high on the MCLR/VPP pin, and when the  
MCLR/VPP pin (and VDD) actually reach their full value,  
is too long. In this situation, when the start-up timer  
times out, VDD has not reached the VDD (min) value  
and the chip is, therefore, not guaranteed to function  
correctly. For such situations, we recommend that  
external RC circuits be used to achieve longer POR  
delay times (Figure 7-8).  
Note: When the device starts normal operation  
(exits the reset condition), device operat-  
ing parameters (voltage, frequency, tem-  
perature, etc.) must be meet to ensure  
operation. If these conditions are not met,  
the device must be held in reset until the  
operating conditions are met.  
For more information on PIC16CR54C POR, see  
Power-Up Considerations - AN522 in the Embedded  
Control Handbook.  
The POR circuit does not produce an internal reset  
when VDD declines.  
DS40191A-page 30  
Preliminary  
1998 Microchip Technology Inc.  
 
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