PIC16F7X7
FIGURE 10-1:
MSSP BLOCK DIAGRAM
(SPI™ MODE)
10.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Internal
Data Bus
10.1 Master SSP (MSSP) Module
Overview
Read
Write
SSPBUF Reg
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
RC4/SDI/
SDA
SSPSR Reg
Shift
bit 0
RC5/SDO
Clock
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I2C™)
- Full Master mode
Peripheral OE
- Slave mode (with general address call)
The I2C interface supports the following modes in
hardware:
RA5/AN4/
LVDIN/SS/
C2OUT
Control
Enable
SS
• Master mode
• Multi-Master mode
• Slave mode
Edge
Select
2
10.2 Control Registers
Clock Select
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I2C mode.
SSPM3:SSPM0
RC3/
SCK/
SCL
SMP:CKE
2
4
TMR2 Output
(
)
2
Edge
Select
TOSC
Prescaler
4, 16, 64
Additional details are provided under the individual
sections.
Data to TX/RX in SSPSR
TRIS bit
10.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four modes
of SPI are supported. To accomplish communication,
typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/LVDIN/SS/C2OUT
Figure 10-1 shows the block diagram of the MSSP
module when operating in SPI mode.
2004 Microchip Technology Inc.
DS30498C-page 93
MICROCHIP [ MICROCHIP ]
