PIC16F7X7
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral feature section.
2.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
SPECIAL FUNCTION REGISTER SUMMARY
Value on:
POR, BOR on page
Details
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 0
(4)
00h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 30, 180
01h
TMR0
Timer0 Module Register
xxxx xxxx 76, 180
0000 0000 29, 180
0001 1xxx 21, 180
xxxx xxxx 30, 180
xx0x 0000 55, 180
xx00 0000 64, 180
xxxx xxxx 66, 180
xxxx xxxx 67, 180
---- x000 68, 180
---0 0000 29, 180
0000 000x 23, 180
(4)
02h
PCL
Program Counter (PC) Least Significant Byte
(4)
03h
STATUS
FSR
IRP
RP1
RP0
TO
PD
Z
DC
C
(4)
04h
Indirect Data Memory Address Pointer
05h
06h
07h
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PORTA Data Latch when written: PORTA pins when read
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
PORTD Data Latch when written: PORTD pins when read
(5)
08h
(5)
09h
—
—
—
—
—
—
RE3
RE2
RE1
RE0
(1,4)
0Ah
—
Write Buffer for the upper 5 bits of the Program Counter
(4)
0Bh
GIE
PEIE
ADIF
CMIF
TMR0IE
RCIF
LVDIF
INT0IE
TXIF
—
RBIE
SSPIF
BCLIF
TMR0IF
CCP1IF
—
INT0IF
TMR2IF
CCP3IF
RBIF
(3)
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
PSPIF
TMR1IF 0000 0000 25, 180
CCP2IF 000- 0-00 27, 180
xxxx xxxx 83, 180
PIR2
OSFIF
TMR1L
TMR1H
T1CON
TMR2
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx 83, 180
—
T1RUN
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON -000 0000 83, 180
0000 0000 86, 180
Timer2 Module Register
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 86, 180
Synchronous Serial Port Receive Buffer/Transmit Register
WCOL SSPOV SSPEN CKP SSPM3
xxxx xxxx 101, 180
SSPM0 0000 0000 101, 180
xxxx xxxx 90, 180
SSPM2
SSPM1
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
xxxx xxxx 90, 180
—
—
CCP1X
SREN
CCP1Y
CREN
CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 88, 180
SPEN
RX9
ADDEN
FERR
OERR
RX9D
0000 000x 134, 180
0000 0000 139, 180
0000 0000 141, 180
xxxx xxxx 92, 180
xxxx xxxx 92, 180
AUSART Transmit Data Register
AUSART Receive Data Register
Capture/Compare/PWM Register 2 (LSB)
Capture/Compare/PWM Register 2 (MSB)
—
—
CCP2X
A/D Result Register High Byte
ADCS1 ADCS0 CHS2
CCP2Y
CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 88, 180
xxxx xxxx 160, 180
CHS1
CHS0
GO/DONE CHS3
ADON 0000 0000 152, 180
Legend: x= unknown, u= unchanged, q= value depends on condition, — = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> bits, whose contents
are transferred to the upper byte of the program counter during branches (CALLor GOTO).
2: Other (non Power-up) Resets include external Reset through MCLR and Watchdog Timer Reset.
3: Bits PSPIE and PSPIF are reserved on the 28-pin devices; always maintain these bits clear.
4: These registers can be addressed from any bank.
5: PORTD, PORTE, TRISD and TRISE are not physically implemented on the 28-pin devices (except for RE3), read as ‘0’.
6: This bit always reads as a ‘1’.
7: OSCCON<OSTS> bit resets to ‘0’ with dual-speed start-up and LP, HS or HS-PLL selected as the oscillator.
8: RE3 is an input only. The state of the TRISE3 bit has no effect and will always read ‘1’.
DS30498C-page 18
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
