PIC16F7X7
FIGURE 2-3:
DATA MEMORY MAP FOR PIC16F747 AND THE PIC16F777
File
Address
File
Address
File
Address
File
Address
Indirect addr.(*)
Indirect addr.(*)
OPTION_REG
PCL
Indirect addr.(*)
Indirect addr.(*)
OPTION_REG
PCL
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
TMR0
PCL
TMR0
PCL
STATUS
FSR
WDTCON
STATUS
FSR
STATUS
FSR
STATUS
FSR
TRISA
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
TRISB
PORTB
TRISB
TRISC
TRISD
TRISE
PCLATH
INTCON
PIE1
LVDCON
PCLATH
INTCON
PMDATA
PMADR
PCLATH
INTCON
PMCON1
PIE2
PIR2
TMR1L
TMR1H
T1CON
TMR2
PCON
OSCCON
OSCTUNE
SSPCON2
PR2
PMDATH
PMADRH
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
SSPADD
SSPSTAT
CCPR3L
CCPR3H
CCP3CON
TXSTA
General
Purpose
Register
16 Bytes
General
Purpose
Register
16 Bytes
RCSTA
TXREG
RCREG
SPBRG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
ADCON2
CMCON
CVRCON
ADRESL
ADCON1
19Fh
1A0h
11Fh
120h
A0h
General
Purpose
Register
80 Bytes
General
Purpose
Register
80 Bytes
General
Purpose
Register
80 Bytes
General
Purpose
Register
EFh
F0h
16Fh
170h
1EFh
1F0h
96 Bytes
Accesses
70h-7Fh
Accesses
70h-7Fh
Accesses
70h-7Fh
17Fh
1FFh
7Fh
FFh
Bank 3
Bank 2
Bank 1
Bank 0
Unimplemented data memory locations read as ‘0’.
*
Not a physical register.
2004 Microchip Technology Inc.
DS30498C-page 17
MICROCHIP [ MICROCHIP ]
