PIC16F62X
FIGURE 4-2: PROGRAM MEMORY MAP AND
STACK FOR THE PIC16F628
4.0
MEMORY ORGANIZATION
4.1
Program Memory Organization
PC<12:0>
The PIC16F62X has a 13-bit program counter capable
of addressing an 8K x 14 program memory space. Only
the first 1K x 14 (0000h - 03FFh) for the PIC16F627
and 2K x 14 (0000h - 07FFh) for the PIC16F628 are
physically implemented. Accessing a location above
these boundaries will cause a wrap-around within the
first 1K x 14 space (PIC16F627) or 2K x 14 space
(PIC16F628). The reset vector is at 0000h and the
interrupt vector is at 0004h (Figure 4-1 and Figure 4-2).
CALL, RETURN
RETFIE, RETLW
13
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
000h
FIGURE 4-1: PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16F627
Interrupt Vector
0004
0005
PC<12:0>
CALL, RETURN
13
RETFIE, RETLW
On-chip Program
Memory
Stack Level 1
Stack Level 2
07FFh
0800h
Stack Level 8
1FFFh
Reset Vector
000h
4.2
Data Memory Organization
The data memory (Figure 4-3) is partitioned into four
Banks which contain the general purpose registers and
the special function registers. The Special Function
Registers are located in the first 32 locations of each
Bank. Register locations 20-7Fh, A0h-FFh, 120h-14Fh,
170h-17Fh and 1F0h-1FFh are general purpose regis-
ters implemented as static RAM.
Interrupt Vector
0004
0005
On-chip Program
Memory
03FFh
0400h
The Table below lists how to access the four banks of
registers:
RP1
RP0
1FFFh
Bank0
Bank1
Bank2
Bank3
0
0
1
1
0
1
0
1
Addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are
implemented as common RAM and mapped back to
addresses 70h-7Fh.
4.2.1
GENERAL PURPOSE REGISTER FILE
The register file is organized as 224 x 8 in the
PIC16F62X. Each is accessed either directly or indi-
rectly through the File Select Register FSR
(Section 4.4).
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 13
MICROCHIP [ MICROCHIP ]
