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PIC16F628-04/SS 参数 Datasheet PDF下载

PIC16F628-04/SS图片预览
型号: PIC16F628-04/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 基于闪存的8位CMOS微控制器 [FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器
文件页数/大小: 160 页 / 1657 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16F62X
TABLE 3-1:
Name
RA0/AN0
RA1/AN1
RA2/AN2/V
REF
RA3/AN3/CMP1
RA4/T0CKI/CMP2
RA5/MCLR/THV
PIC16F62X PINOUT DESCRIPTION
DIP/
SOIC
Pin #
17
18
1
2
3
4
SSOP
Pin #
19
20
1
2
3
4
I/O/P
Type
I/O
I/O
I/O
I/O
I/O
I
Buffer
Type
ST
ST
ST
ST
ST
ST
Description
Bi-directional I/O port/Analog comparator input
Bi-directional I/O port/Analog comparator input
Bi-directional I/O port/Analog comparator input/V
REF
out-
put
Bi-directional I/O port/Analog comparator input/compara-
tor output
Bi-directional I/O port/Can be configured as T0CKI/com-
parator output
Input port/master clear (reset input/programming voltage
input. When configured as MCLR, this pin is an active low
reset to the device. Voltage on MCLR/THV must not
exceed V
DD
during normal device operation.
Bi-directional I/O port/Oscillator crystal output. Connects
to crystal or resonator in crystal oscillator mode. In ER
mode, OSC2 pin outputs CLKOUT which has 1/4 the fre-
quency of OSC1, and denotes the instruction cycle rate.
Bi-directional I/O port/Oscillator crystal input/external
clock source input. ER biasing pin.
Bi-directional I/O port/external interrupt. Can be software
programmed for internal weak pull-up.
Bi-directional I/O port/ USART receive pin/synchronous
data I/O. Can be software programmed for internal weak
pull-up.
Bi-directional I/O port/ USART transmit pin/synchronous
clock I/O. Can be software programmed for internal weak
pull-up.
Bi-directional I/O port/Capture/Compare/PWM I/O. Can
be software programmed for internal weak pull-up.
Bi-directional I/O port/Low voltage programming input pin.
Wake-up from SLEEP on pin change. Can be software
programmed for internal weak pull-up. When low voltage
programming is enabled, the interrupt on pin change and
weak pull-up resistor are disabled.
Bi-directional I/O port/Wake-up from SLEEP on pin
change. Can be software programmed for internal weak
pull-up.
Bi-directional I/O port/Timer1 oscillator output/Timer1
clock input. Wake up from SLEEP on pin change. Can be
software programmed for internal weak pull-up.
Bi-directional I/O port/Timer1 oscillator input. Wake up
from SLEEP on pin change. Can be software programmed
for internal weak pull-up.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
RA6/OSC2/CLKOUT
15
17
I/O
ST
RA7/OSC1/CLKIN
RB0/INT
RB1/RX/DT
16
6
7
18
7
8
I/O
I/O
I/O
ST
TTL/ST
(1)
TTL/ST
(3)
RB2/TX/CK
8
9
I/O
TTL/ST
(3)
RB3/CCP1
RB4/PGM
9
10
10
11
I/O
I/O
TTL/ST
(4)
TTL/ST
(5)
RB5
11
12
I/O
TTL
RB6/T1OSO/T1CKI
12
13
I/O
TTL/ST
(2)
RB7/T1OSI
13
14
I/O
TTL/ST
(2)
V
SS
V
DD
5
14
5,6
15,16
P
P
Legend:
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
O = output
I/O = input/output
P = power
— = Not used
I = Input
ST = Schmitt Trigger input
TTL = TTL input
I/OD =input/open drain output
This buffer is a Schmitt Trigger input when configured as the external interrupt.
This buffer is a Schmitt Trigger input when used in serial programming mode.
This buffer is a Schmitt Trigger I/O when used in USART/Synchronous mode.
This buffer is a Schmitt Trigger I/O when used in CCP mode.
This buffer is a Schmitt Trigger input when used in low voltage program mode.
©
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 11