PIC16F62X
TABLE 3-1:
Name
PIC16F62X PINOUT DESCRIPTION
DIP/
SSOP
Pin #
I/O/P
Type
Buffer
Type
SOIC
Pin #
Description
RA0/AN0
17
18
1
19
20
1
I/O
I/O
I/O
ST
ST
ST
Bi-directional I/O port/Analog comparator input
Bi-directional I/O port/Analog comparator input
RA1/AN1
RA2/AN2/VREF
Bi-directional I/O port/Analog comparator input/VREF out-
put
RA3/AN3/CMP1
RA4/T0CKI/CMP2
RA5/MCLR/THV
2
3
4
2
3
4
I/O
I/O
I
ST
ST
ST
Bi-directional I/O port/Analog comparator input/compara-
tor output
Bi-directional I/O port/Can be configured as T0CKI/com-
parator output
Input port/master clear (reset input/programming voltage
input. When configured as MCLR, this pin is an active low
reset to the device. Voltage on MCLR/THV must not
exceed VDD during normal device operation.
RA6/OSC2/CLKOUT
15
17
I/O
ST
ST
Bi-directional I/O port/Oscillator crystal output. Connects
to crystal or resonator in crystal oscillator mode. In ER
mode, OSC2 pin outputs CLKOUT which has 1/4 the fre-
quency of OSC1, and denotes the instruction cycle rate.
RA7/OSC1/CLKIN
RB0/INT
16
6
18
7
I/O
I/O
I/O
Bi-directional I/O port/Oscillator crystal input/external
clock source input. ER biasing pin.
(1)
Bi-directional I/O port/external interrupt. Can be software
programmed for internal weak pull-up.
TTL/ST
(3)
RB1/RX/DT
7
8
TTL/ST
Bi-directional I/O port/ USART receive pin/synchronous
data I/O. Can be software programmed for internal weak
pull-up.
(3)
RB2/TX/CK
8
9
I/O
TTL/ST
Bi-directional I/O port/ USART transmit pin/synchronous
clock I/O. Can be software programmed for internal weak
pull-up.
(4)
(5)
RB3/CCP1
RB4/PGM
9
10
11
I/O
I/O
TTL/ST
Bi-directional I/O port/Capture/Compare/PWM I/O. Can
be software programmed for internal weak pull-up.
10
TTL/ST
Bi-directional I/O port/Low voltage programming input pin.
Wake-up from SLEEP on pin change. Can be software
programmed for internal weak pull-up. When low voltage
programming is enabled, the interrupt on pin change and
weak pull-up resistor are disabled.
RB5
11
12
13
12
13
14
I/O
I/O
I/O
TTL
TTL/ST
TTL/ST
Bi-directional I/O port/Wake-up from SLEEP on pin
change. Can be software programmed for internal weak
pull-up.
(2)
(2)
RB6/T1OSO/T1CKI
RB7/T1OSI
Bi-directional I/O port/Timer1 oscillator output/Timer1
clock input. Wake up from SLEEP on pin change. Can be
software programmed for internal weak pull-up.
Bi-directional I/O port/Timer1 oscillator input. Wake up
from SLEEP on pin change. Can be software programmed
for internal weak pull-up.
VSS
5
5,6
P
—
—
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
VDD
14
15,16
P
Legend:
O = output
I/O = input/output
P = power
— = Not used
I = Input
ST = Schmitt Trigger input
TTL = TTL input
I/OD =input/open drain output
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
Note 2: This buffer is a Schmitt Trigger input when used in serial programming mode.
Note 3: This buffer is a Schmitt Trigger I/O when used in USART/Synchronous mode.
Note 4: This buffer is a Schmitt Trigger I/O when used in CCP mode.
Note 5: This buffer is a Schmitt Trigger input when used in low voltage program mode.
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 11
MICROCHIP [ MICROCHIP ]
