PIC16C63A/65B/73B/74B
APPENDIX A:
Version
A
REVISION HISTORY
Date
7/98
Revision Description
This is a new data sheet. However, the devices described in this data sheet are
the upgrades to the devices found in the
PIC16C6X Data Sheet,
DS30234, and
the
PIC16C7X Data Sheet,
DS30390.
Corrections to Version A data sheet for technical accuracy.
Added data:
• Operation of the SMP and CKE bits of the SSPSTAT register in I
2
C mode
have been specified
• Frequency vs. V
DD
graphs for device operating area (in Electrical
Specifications)
• Formula for calculating A/D acquisition time, T
ACQ
(in the A/D section)
• Brief description of instructions
Removed data (see PICmicro
TM
Mid-Range MCU Family Reference Manual,
DS33023, for additional data):
• USART Baud Rate Tables (formulas for calculating baud rate remain)
• Minor changes to text to clarify content
• Revised some DC specifications
• Included characteristic charts and graphs
B
1/99
C
12/00
APPENDIX B:
TABLE B-1:
Difference
A/D
Parallel Slave Port
Packages
DEVICE DIFFERENCES
The differences between the devices in this data sheet are listed in Table B-1.
DEVICE DIFFERENCES
PIC16C63A
no
no
28-pin PDIP, 28-pin
windowed CERDIP,
28-pin SOIC, 28-pin
SSOP
no
yes
40-pin PDIP, 40-pin
windowed CERDIP,
44-pin TQFP, 44-pin
MQFP, 44-pin PLCC
PIC16C65B
PIC16C73B
5 channels, 8 bits
no
28-pin PDIP, 28-pin
windowed CERDIP,
28-pin SOIC, 28-pin
SSOP
PIC16C74B
8 channels, 8 bits
yes
40-pin PDIP, 40-pin
windowed CERDIP,
44-pin TQFP, 44-pin
MQFP, 44-pin PLCC
2000 Microchip Technology Inc.
DS30605C-page 165