PIC16F/LF1946/47
FIGURE 7-3:
INTERRUPT LATENCY
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKOUT
Interrupt Sampled
during Q1
Interrupt
GIE
PC-1
PC
PC+1
0004h
NOP
0005h
PC
1 Cycle Instruction at PC
Execute
Inst(PC)
NOP
Inst(0004h)
Interrupt
GIE
PC+1/FSR
ADDR
New PC/
PC+1
PC-1
PC
0004h
NOP
0005h
PC
Execute
2 Cycle Instruction at PC
Inst(PC)
NOP
Inst(0004h)
Interrupt
GIE
PC-1
PC
FSR ADDR
INST(PC)
PC+1
NOP
PC+2
NOP
0004h
NOP
0005h
PC
Execute
3 Cycle Instruction at PC
Inst(0004h)
Inst(0005h)
Interrupt
GIE
PC-1
PC
FSR ADDR
INST(PC)
PC+1
NOP
PC+2
0004h
NOP
0005h
PC
NOP
Execute
3 Cycle Instruction at PC
NOP
Inst(0004h)
DS41414A-page 86
Preliminary
2010 Microchip Technology Inc.