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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
DECFSZ  
Decrement f, Skip if 0  
INCFSZ  
Increment f, Skip if 0  
Syntax:  
[ label ] DECFSZ f,d  
Syntax:  
[ label ] INCFSZ f,d  
Operands:  
0 f 127  
d [0,1]  
Operands:  
0 f 127  
d [0,1]  
Operation:  
(f) - 1 (destination);  
skip if result = 0  
Operation:  
(f) + 1 (destination),  
skip if result = 0  
Status Affected:  
Description:  
None  
Status Affected:  
Description:  
None  
The contents of register ‘f’ are decre-  
mented. If ‘d’ is ‘0’, the result is placed  
in the W register. If ‘d’ is ‘1’, the result  
is placed back in register ‘f’.  
The contents of register ‘f’ are incre-  
mented. If ‘d’ is ‘0’, the result is placed  
in the W register. If ‘d’ is ‘1’, the result  
is placed back in register ‘f’.  
If the result is ‘1’, the next instruction is  
executed. If the result is ‘0’, then a  
NOPis executed instead, making it a  
2-cycle instruction.  
If the result is ‘1’, the next instruction is  
executed. If the result is ‘0’, a NOPis  
executed instead, making it a 2-cycle  
instruction.  
GOTO  
Unconditional Branch  
IORLW  
Inclusive OR literal with W  
Syntax:  
[ label ] GOTO  
0 k 2047  
k
Syntax:  
[ label ] IORLW  
0 k 255  
(W) .OR. k (W)  
Z
k
Operands:  
Operation:  
Operands:  
Operation:  
Status Affected:  
Description:  
k PC<10:0>  
PCLATH<4:3> PC<12:11>  
Status Affected:  
Description:  
None  
The contents of the W register are  
OR’ed with the eight-bit literal ‘k’. The  
result is placed in the W register.  
GOTOis an unconditional branch. The  
eleven-bit immediate value is loaded  
into PC bits <10:0>. The upper bits of  
PC are loaded from PCLATH<4:3>.  
GOTOis a two-cycle instruction.  
INCF  
Increment f  
IORWF  
Inclusive OR W with f  
Syntax:  
[ label ] INCF f,d  
Syntax:  
[ label ] IORWF f,d  
Operands:  
0 f 127  
d [0,1]  
Operands:  
0 f 127  
d [0,1]  
Operation:  
(f) + 1 (destination)  
Operation:  
(W) .OR. (f) (destination)  
Status Affected:  
Description:  
Z
Status Affected:  
Description:  
Z
The contents of register ‘f’ are incre-  
mented. If ‘d’ is ‘0’, the result is placed  
in the W register. If ‘d’ is ‘1’, the result  
is placed back in register ‘f’.  
Inclusive OR the W register with regis-  
ter ‘f’. If ‘d’ is ‘0’, the result is placed in  
the W register. If ‘d’ is ‘1’, the result is  
placed back in register ‘f’.  
DS41414A-page 374  
Preliminary  
2010 Microchip Technology Inc.  
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