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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
28.2 Instruction Descriptions  
ADDFSR  
Add Literal to FSRn  
ANDLW  
AND literal with W  
Syntax:  
[ label ] ADDFSR FSRn, k  
Syntax:  
[ label ] ANDLW  
0 k 255  
k
Operands:  
-32 k 31  
n [ 0, 1]  
Operands:  
Operation:  
Status Affected:  
Description:  
(W) .AND. (k) (W)  
Operation:  
FSR(n) + k FSR(n)  
Z
Status Affected:  
Description:  
None  
The contents of W register are  
AND’ed with the eight-bit literal ‘k’.  
The result is placed in the W register.  
The signed 6-bit literal ‘k’ is added to  
the contents of the FSRnH:FSRnL  
register pair.  
FSRn is limited to the range 0000h -  
FFFFh. Moving beyond these bounds  
will cause the FSR to wrap around.  
ANDWF  
AND W with f  
ADDLW  
Add literal and W  
Syntax:  
[ label ] ANDWF f,d  
Syntax:  
[ label ] ADDLW  
0 k 255  
k
Operands:  
0 f 127  
d 0,1  
Operands:  
Operation:  
Status Affected:  
Description:  
(W) + k (W)  
C, DC, Z  
Operation:  
(W) .AND. (f) (destination)  
Status Affected:  
Description:  
Z
The contents of the W register are  
added to the eight-bit literal ‘k’ and the  
result is placed in the W register.  
AND the W register with register ‘f’. If  
‘d’ is ‘0’, the result is stored in the W  
register. If ‘d’ is ‘1’, the result is stored  
back in register ‘f’.  
ASRF  
Arithmetic Right Shift  
ADDWF  
Add W and f  
Syntax:  
[ label ] ASRF f {,d}  
Syntax:  
[ label ] ADDWF f,d  
Operands:  
0 f 127  
d [0,1]  
Operands:  
0 f 127  
d 0,1  
Operation:  
(f<7>)dest<7>  
(f<7:1>) dest<6:0>,  
(f<0>) C,  
Operation:  
(W) + (f) (destination)  
Status Affected:  
Description:  
C, DC, Z  
Add the contents of the W register  
with register ‘f’. If ‘d’ is ‘0’, the result is  
stored in the W register. If ‘d’ is ‘1’, the  
result is stored back in register ‘f’.  
Status Affected:  
Description:  
C, Z  
The contents of register ‘f’ are shifted  
one bit to the right through the Carry  
flag. The MSb remains unchanged. If  
‘d’ is ‘0’, the result is placed in W. If ‘d’  
is ‘1’, the result is stored back in  
register ‘f’.  
ADDWFC  
ADD W and CARRY bit to f  
C
register f  
Syntax:  
[ label ] ADDWFC  
f {,d}  
Operands:  
0 f 127  
d [0,1]  
Operation:  
(W) + (f) + (C) dest  
Status Affected:  
Description:  
C, DC, Z  
Add W, the Carry flag and data mem-  
ory location ‘f’. If ‘d’ is ‘0’, the result is  
placed in W. If ‘d’ is ‘1’, the result is  
placed in data memory location ‘f’.  
2010 Microchip Technology Inc.  
Preliminary  
DS41414A-page 371  
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