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PIC16LF1947-E/MR 参数 Datasheet PDF下载

PIC16LF1947-E/MR图片预览
型号: PIC16LF1947-E/MR
PDF下载: 下载PDF文件 查看货源
内容描述: [64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology]
分类和应用: 微控制器
文件页数/大小: 440 页 / 4740 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F/LF1946/47  
2
23.6.5 I C MASTER MODE REPEATED  
SSPxCON2 register will be automatically cleared and  
the Baud Rate Generator will not be reloaded, leaving  
the SDAx pin held low. As soon as a Start condition is  
detected on the SDAx and SCLx pins, the S bit of the  
SSPxSTAT register will be set. The SSPxIF bit will not  
be set until the Baud Rate Generator has timed out.  
START CONDITION TIMING  
A Repeated Start condition occurs when the RSEN bit  
of the SSPxCON2 register is programmed high and the  
Master state machine is no longer active. When the  
RSEN bit is set, the SCLx pin is asserted low. When the  
SCLx pin is sampled low, the Baud Rate Generator is  
loaded and begins counting. The SDAx pin is released  
(brought high) for one Baud Rate Generator count  
(TBRG). When the Baud Rate Generator times out, if  
SDAx is sampled high, the SCLx pin will be deasserted  
(brought high). When SCLx is sampled high, the Baud  
Rate Generator is reloaded and begins counting. SDAx  
and SCLx must be sampled high for one TBRG. This  
action is then followed by assertion of the SDAx pin  
(SDAx = 0) for one TBRG while SCLx is high. SCLx is  
asserted low. Following this, the RSEN bit of the  
Note 1: If RSEN is programmed while any other  
event is in progress, it will not take effect.  
2: A bus collision during the Repeated Start  
condition occurs if:  
• SDAx is sampled low when SCLx  
goes from low-to-high.  
• SCLx goes low before SDAx is  
asserted low. This may indicate that  
another master is attempting to  
transmit a data ‘1’.  
FIGURE 23-27:  
REPEAT START CONDITION WAVEFORM  
S bit set by hardware  
Write to SSPxCON2  
occurs here  
SDAx = 1,  
At completion of Start bit,  
hardware clears RSEN bit  
and sets SSPxIF  
SDAx = 1,  
SCLx = 1  
SCLx (no change)  
TBRG  
TBRG  
TBRG  
1st bit  
SDAx  
SCLx  
Write to SSPxBUF occurs here  
TBRG  
Sr  
Repeated Start  
TBRG  
2010 Microchip Technology Inc.  
Preliminary  
DS41414A-page 269  
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