PIC16F/LF1946/47
22.3.7
OPERATION IN SLEEP MODE
In Sleep mode, the TMRx register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMRx will continue from its
previous state.
22.3.8
CHANGES IN SYSTEM CLOCK
FREQUENCY
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)” for additional details.
22.3.9
EFFECTS OF RESET
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 22-7: SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
Register
on Page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(1)
CCPxCON
CCPTMRS0
CCPTMRS1
INTCON
PIE1
PxM<1:0>
DCxB<1:0>
C3TSEL<1:0>
CCPxM<3:0>
C2TSEL<1:0> C1TSEL<1:0>
C5TSEL<1:0>
229
230
231
89
C4TSEL<1:0>
—
—
—
—
—
—
GIE
TMR1GIE
OSFIE
—
PEIE
TMR0IE
RCIE
INTE
IOCIE
SSPIE
BCLIE
TMR6IE
SSPIF
BCLIF
TMR6IF
TMR0IF
CCP1IE
LCDIE
—
INTF
IOCIF
TMR1IE
CCP2IE
—
ADIE
TXIE
TMR2IE
—
90
PIE2
C2IE
C1IE
EEIE
91
PIE3
CCP5IE
ADIF
CCP4IE
RCIF
CCP3IE
TXIF
TMR4IE
TMR2IF
—
92
PIR1
TMR1GIF
OSFIF
—
CCP1IF
LCDIF
—
TMR1IF
CCP2IF
—
94
PIR2
C2IF
C1IF
EEIF
95
PIR3
CCP5IF
CCP4IF
CCP3IF
TMR4IF
96
PRx
Timer2/4/6 Period Register
—
203*
205
203
124
127
130
133
136
TxCON
TMRx
TxOUTPS<3:0>
TMRxON
TxCKPS<:0>1
Timer2/4/6 Module Register
TRISA
TRISB
TRISC
TRISD
TRISE
TRISA7
TRISB7
TRISC7
TRISD7
—
TRISA6
TRISB6
TRISC6
TRISD6
—
TRISA5
TRISB5
TRISC5
TRISD5
—
TRISA4
TRISB4
TRISC4
TRISD4
—
TRISA3
TRISB3
TRISC3
TRISD3
TRISE3
TRISA2
TRISB2
TRISC2
TRISD2
TRISE2
TRISA1
TRISB1
TRISC1
TRISD1
TRISE1
TRISA0
TRISB0
TRISC0
TRISD0
TRISE0
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1: Applies to ECCP modules only.
*
Page provides register information.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 215
MICROCHIP [ MICROCHIP ]
