PIC16F/LF1946/47
REGISTER 12-24: PORTG: PORTG REGISTER
U-0
—
U-0
—
R/W-x/u
RG5
R/W-x/u
RG4
R/W-x/u
RG3
R/W-x/u
RG2
R/W-x/u
RG1
R/W-x/u
RG0
bit 7
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’.
RG<5:0>: PORTG General Purpose I/O Pin bits
1= Port pin is > VIH
0= Port pin is < VIL
REGISTER 12-25: TRISG: PORTG TRI-STATE REGISTER
U-0
—
U-0
—
R-1/1
R/W-1/1
TRISG4
R/W-1/1
TRISG3
R/W-1/1
TRISG2
R/W-1/1
TRISG1
R/W-1/1
TRISG0
bit 0
TRISG5
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5
Unimplemented: Read as ‘0’.
TRISG5: PORTG Tri-State Control bit
This bit (RG5 pin) is an input only and always read as ‘1’.
bit 4-0
TRISG<4:0>: PORTG Tri-State Control bits
1= PORTG pin configured as an input (tri-stated)
0= PORTG pin configured as an output
REGISTER 12-26: LATG: PORTG DATA LATCH REGISTER
U-0
—
U-0
—
R/W-x/u
LATG5
R/W-x/u
LATG4
R/W-x/u
LATG3
R/W-x/u
LATG2
R/W-x/u
LATG1
R/W-x/u
LATG0
bit 0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’.
LATG<5:0>: PORTG Output Latch Value bits
Note 1: Writes to PORTG are actually written to corresponding LATG register. Reads from PORTG register is return of actual
I/O pin values.
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 143
MICROCHIP [ MICROCHIP ]
