PIC16F/LF1946/47
12.5.1
PORTD FUNCTIONS AND OUTPUT
PRIORITIES
12.5 PORTD Registers
PORTD is
a 8-bit wide, bidirectional port. The
Each PORTD pin is multiplexed with other functions. The
pins, their combined functions and their output priorities
are briefly described here. For additional information,
refer to the appropriate section in this data sheet.
corresponding data direction register is TRISD
(Register 12-13). Setting a TRISD bit (= 1) will make the
corresponding PORTD pin an input (i.e., put the
corresponding output driver in a High-Impedance mode).
Clearing a TRISD bit (= 0) will make the corresponding
PORTD pin an output (i.e., enable the output driver and
put the contents of the output latch on the selected pin).
Example 12-4 shows how to initialize PORTD.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the lowest number in
the following lists.
Analog input and some digital input functions are not
included in the list below. These input functions can
remain active when the pin is configured as an output.
Certain digital input functions override other port
functions and are included in the priority list.
Reading the PORTD register (Register 12-13) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then written
to the PORT data latch (LATD).
RD0
1. SEG0 (LCD)
2. P2D (CCP)
The TRISD register (Register 12-14) controls the
PORTD pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits
in the TRISD register are maintained set when using
them as analog inputs. I/O pins configured as analog
input always read ‘0’.
RD1
1. SEG1 (LCD)
2. P2C (CCP)
RD2
EXAMPLE 12-4:
INITIALIZING PORTD
1. P2B (CCP)
2. SEG2 (LCD)
BANKSEL PORTD
;
CLRF
BANKSEL LATD
CLRF LATD
BANKSEL TRISD
PORTD
;Init PORTD
;Data Latch
;
;
RD3
1. SEG3 (LCD)
2. P3C (CCP)
MOVLW
MOVWF
B'11110000' ;Set RD<7:4> as inputs
TRISD
;and set RD<3:0> as
;outputs
RD4
1. SEG4 (LCD)
2. P3D (CCP)
3. SDO2 (SSP2)
RD5
1. SEG5 (LCD)
2. P1C (CCP)
3. SDI2/SDA2 (SSP2)
RD6
1. SEG5 (LCD)
2. P1B (CCP)
3. SCK2/SCL2 (SSP2)
RD7
1. SEG7 (LCD)
2. SS2 (SSP2)
DS41414A-page 132
Preliminary
2010 Microchip Technology Inc.