PIC16C63A/65B/73B/74B
FIGURE 16-16:
I2C BUS START/STOP BITS TIMING
SCL
SDA
91
93
90
92
STOP
Condition
START
Condition
Note:
Refer to Figure 16-4 for load conditions.
TABLE 16-12: I2C BUS START/STOP BITS REQUIREMENTS
Param
Sym
Characteristic
Min Typ Max Units
Conditions
No.
90*
TSU:STA START condition 100 kHz mode
Setup time 400 kHz mode
THD:STA START condition 100 kHz mode
4700
600
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns Only relevant for Repeated
START condition
91*
92*
93
4000
600
ns After this period the first clock
pulse is generated
Hold time
TSU:STO STOP condition
Setup time
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
4700
600
ns
THD:STO STOP condition
Hold time
4000
600
ns
* These parameters are characterized but not tested.
FIGURE 16-17:
I2C BUS DATA TIMING
103
102
100
101
SCL
90
106
107
91
92
SDA
In
110
109
109
SDA
Out
Note:
Refer to Figure 16-4 for load conditions.
DS30605C-page 134
2000 Microchip Technology Inc.