PIC16C63A/65B/73B/74B
FIGURE 16-10:
CAPTURE/COMPARE/PWM TIMINGS (CCP1 AND CCP2)
CCPx
(Capture mode)
50
51
52
54
CCPx
(Compare or PWM mode)
53
Note:
Refer to Figure 16-4 for load conditions.
TABLE 16-6: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP1 AND CCP2)
Param
Sym
Characteristic
Min
Typ† Max Units Conditions
No.
50* TccL CCP1 and
CCP2
No Prescaler
0.5TCY + 20
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
With Prescaler PIC16CXX
PIC16LCXX
10
ns
input low time
20
0.5TCY + 20
10
ns
51* TccH CCP1 and
CCP2
No Prescaler
ns
With Prescaler PIC16CXX
PIC16LCXX
ns
input high time
20
ns
52* TccP CCP1 and CCP2 input period
3TCY + 40
N
ns N = prescale
value (1,4, or 16)
53* TccR CCP1 and CCP2 output rise time PIC16CXX
PIC16LCXX
—
—
—
—
10
25
10
25
25
45
25
45
ns
ns
ns
ns
54* TccF CCP1 and CCP2 output fall time PIC16CXX
PIC16LCXX
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and
are not tested.
DS30605C-page 128
2000 Microchip Technology Inc.