欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16C62B-04/SO 参数 Datasheet PDF下载

PIC16C62B-04/SO图片预览
型号: PIC16C62B-04/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28引脚8位CMOS微控制器 [28-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 120 页 / 1994 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC16C62B-04/SO的Datasheet PDF文件第39页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第40页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第41页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第42页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第44页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第45页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第46页浏览型号PIC16C62B-04/SO的Datasheet PDF文件第47页  
PIC16C62B/72A  
8.3.1.2  
RECEPTION  
When the address byte overflow condition exists, then  
no acknowledge (ACK) pulse is given. An overflow con-  
dition is defined as either bit BF (SSPSTAT<0>) is set  
or bit SSPOV (SSPCON<6>) is set.  
When the R/W bit of the address byte is clear and an  
address match occurs, the R/W bit of the SSPSTAT reg-  
ister is cleared. The received address is loaded into the  
SSPBUF register.  
An SSP interrupt is generated for each data transfer  
byte. Flag bit SSPIF (PIR1<3>) must be cleared in soft-  
ware. The SSPSTAT register is used to determine the  
status of the byte.  
FIGURE 8-3:  
I2C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)  
Receiving Address  
A7 A6 A5 A4  
R/W=0  
Receiving Data  
Receiving Data  
ACK  
9
ACK  
9
ACK  
9
SDA  
SCL  
A3 A2 A1  
D7 D6 D5 D4 D3 D2  
D0  
8
D7 D6  
D5  
D4 D3  
D2  
D0  
8
D1  
7
D1  
7
3
7
1
2
4
5
4
3
6
5
6
1
2
3
6
1
2
4
8
5
P
S
SSPIF (PIR1<3>)  
Cleared in software  
Bus Master  
terminates  
transfer  
BF (SSPSTAT<0>)  
SSPBUF register is read  
SSPOV (SSPCON<6>)  
Bit SSPOV is set because the SSPBUF register is still full.  
ACK is not sent.  
1999 Microchip Technology Inc.  
Preliminary  
DS35008B-page 43