PIC12F683
2.2.2.6
PCON Register
The Power Control (PCON) register contains flag bits
(see Table 12-2) to differentiate between a:
• Power-on Reset (POR)
• Brown-out Detect (BOD)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the Ultra Low-Power
Wake-up and software enable of the BOD.
The PCON register bits are shown in Register 2-6.
REGISTER 2-6:
PCON – POWER CONTROL REGISTER (ADDRESS: 8Eh)
U-0
—
U-0
—
R/W-0
R/W-1
U-0
—
U-0
—
R/W-0
POR
R/W-x
BOD
ULPWUE SBODEN
bit 7
bit 0
bit 7-6
bit 5
Unimplemented: Read as ‘0’
ULPWUE: Ultra Low-Power Wake-up Enable bit
1= Ultra Low-Power Wake-up enabled
0= Ultra Low-Power Wake-up disabled
bit 4
SBODEN: Software BOD Enable bit(1)
1= BOD enabled
0= BOD disabled
bit 3-2
bit 1
Unimplemented: Read as ‘0’
POR: Power-on Reset Status bit
1= No Power-on Reset occurred
0= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOD: Brown-out Detect Status bit
1= No Brown-out Detect occurred
0= A Brown-out Detect occurred (must be set in software after a Brown-out Detect occurs)
Note 1: BODEN<1:0> = 01in the Configuration Word register for this bit to control the BOD.
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
DS41211B-page 16
Preliminary
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
