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PIC12F683-I/SNG 参数 Datasheet PDF下载

PIC12F683-I/SNG图片预览
型号: PIC12F683-I/SNG
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO8, 3.90 MM, PLASTIC, SOIC-8]
分类和应用: 闪存微控制器
文件页数/大小: 148 页 / 2282 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F683  
3.2  
Clock Source Modes  
3.3  
External Clock Modes  
Clock source modes can be classified as external or  
internal.  
3.3.1  
OSCILLATOR START-UP TIMER  
(OST)  
• External clock modes rely on external circuitry  
for the clock source. Examples are oscillator  
modules (EC mode), quartz crystal resonators or  
ceramic resonators (LP, XT and HS modes) and  
Resistor-Capacitor (RC mode) circuits.  
If the PIC12F683 is configured for LP, XT or HS modes,  
the Oscillator Start-up Timer (OST) counts 1024 oscil-  
lations from the OSC1 pin, following a Power-on Reset  
(POR) and the Power-up Timer (PWRT) has expired (if  
configured), or a wake-up from Sleep. During this time,  
the program counter does not increment and program  
execution is suspended. The OST ensures that the  
oscillator circuit, using a quartz crystal resonator or  
ceramic resonator, has started and is providing a stable  
system clock to the PIC12F683. When switching  
between clock sources a delay is required to allow the  
new clock to stabilize. These oscillator delays are  
shown in Table 3-1.  
• Internal clock sources are contained internally  
within the PIC12F683. The PIC12F683 has two  
internal oscillators: the 8 MHz High-Frequency  
Internal Oscillator (HFINTOSC) and 31 kHz  
Low-Frequency Internal Oscillator (LFINTOSC).  
The system clock can be selected between external or  
internal clock sources via the System Clock Selection  
(SCS) bit (see Section 3.5 “Clock Switching”).  
In order to minimize latency between external oscillator  
start-up and code execution, the Two-Speed Clock Start-  
up mode can be selected (see Section 3.6 “Two-Speed  
Clock Start-up Mode”).  
TABLE 3-1:  
OSCILLATOR DELAY EXAMPLES  
Switch From  
Switch To  
Frequency  
Oscillator Delay  
LFINTOSC  
HFINTOSC  
31 kHz  
125 kHz-8 MHz  
Sleep/POR  
5 µs–10 µs (approx.) CPU  
Sleep/POR  
LFINTOSC (31 kHz)  
Sleep/POR  
EC, RC  
EC, RC  
DC – 20 MHz  
DC – 20 MHz  
31 kHz-20 MHz  
125 kHz-8 MHz  
Start-up(1)  
LP, XT, HS  
HFINTOSC  
1024 Clock Cycles (OST)  
LFINTOSC (31 kHz)  
1 µs (approx.)  
Note 1: The 5 µs–10 µs start-up delay is based on a 1 MHz system clock.  
3.3.2  
EC MODE  
FIGURE 3-2:  
EXTERNAL CLOCK (EC)  
MODE OPERATION  
The External Clock (EC) mode allows an externally  
generated logic level as the system clock source.  
When operating in this mode, an external clock source  
is connected to the OSC1 pin and the GP5 pin is  
available for general purpose I/O. Figure 3-2 shows the  
pin connections for EC mode.  
OSC1/CLKIN  
PIC12F683  
I/O (OSC2)  
Clock from  
Ext. System  
GP4  
The Oscillator Start-up Timer (OST) is disabled when  
EC mode is selected. Therefore, there is no delay in  
operation after a Power-on Reset (POR) or wake-up  
from Sleep. Because the PIC12F683 design is fully  
static, stopping the external clock input will have the  
effect of halting the device while leaving all data intact.  
Upon restarting the external clock, the device will  
resume operation as if no time had elapsed.  
DS41211B-page 20  
Preliminary  
2004 Microchip Technology Inc.