KSZ8041NL/RNL
3.12.1
TRANSMIT CLOCK (TXC)
TXC is sourced by the PHY. It is a continuous clock that provides the timing reference for Transmit Enable (TXEN) and
Transmit Data [3:0] (TXD[3:0]).
TXC is 2.5 MHz for 10 Mbps operation and 25 MHz for 100 Mbps operation.
3.12.2
TRANSMIT ENABLE (TXEN)
TXEN indicates the MAC is presenting nibbles on TXD[3:0] for transmission. It is asserted synchronously with the first
nibble of the preamble and remains asserted while all nibbles to be transmitted are presented on the MII, and is negated
prior to the first TXC following the final nibble of a frame.
TXEN transitions synchronously with respect to TXC.
3.12.3
TRANSMIT DATA [3:0] (TXD[3:0])
TXD[3:0] transitions synchronously with respect to TXC. When TXEN is asserted, TXD[3:0] are accepted for transmis-
sion by the PHY. TXD[3:0] is “00” to indicate idle when TXEN is deasserted. Values other than “00” on TXD[3:0] while
TXEN is deasserted are ignored by the PHY.
3.12.4
RECEIVE CLOCK (RXC)
RXC provides the timing reference for RXDV, RXD[3:0], and RXER.
• In 10 Mbps mode, RXC is recovered from the line while the carrier is active. RXC is derived from the PHY’s refer-
ence clock when the line is idle or the link is down.
• In 100 Mbps mode, RXC is continuously recovered from the line. If the link is down, RXC is derived from the
PHY’s reference clock.
RXC is 2.5 MHz for 10 Mbps operation and 25 MHz for 100 Mbps operation.
3.12.5
RECEIVE DATA VALID (RXDV)
RXDV is driven by the PHY to indicate that the PHY is presenting recovered and decoded nibbles on RXD[3:0].
• In 10 Mbps mode, RXDV is asserted with the first nibble of the SFD (Start of Frame Delimiter), “5D”, and remains
asserted until the end of the frame.
• In 100 Mbps mode, RXDV is asserted from the first nibble of the preamble to the last nibble of the frame.
RXDV transitions synchronously with respect to RXC.
3.12.6
RECEIVE DATA [3:0] (RXD[3:0])
RXD[3:0] transitions synchronously with respect to RXC. For each clock period in which RXDV is asserted, RXD[3:0]
transfers a nibble of recovered data from the PHY.
3.12.7
RECEIVE ERROR (RXER)
RXER is asserted for one or more RXC periods to indicate that a Symbol Error (for example, a coding error that a PHY
is capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the
frame presently being transferred from the PHY.
RXER transitions synchronously with respect to RXC. While RXDV is deasserted, RXER has no effect on the MAC.
3.12.8
CARRIER SENSE (CRS)
CRS is asserted and deasserted as follows:
• In 10 Mbps mode, CRS assertion is based on the reception of valid preambles. CRS deassertion is based on the
reception of an end-of-frame (EOF) marker.
• In 100 Mbps mode, CRS is asserted when a start-of-stream delimiter, or /J/K symbol pair is detected. CRS is
deasserted when an end-of-stream delimiter, or /T/R symbol pair is detected. Additionally, the PMA layer
deasserts CRS if IDLE symbols are received without /T/R.
3.12.9
COLLISION (COL)
COL is asserted in half-duplex mode whenever the transmitter and the receiver are simultaneously active on the line.
This is used to inform the MAC that a collision has occurred during its transmission to the PHY.
COL transitions asynchronously with respect to TXC and RXC.
2017 Microchip Technology Inc.
DS00002245B-page 21
MICROCHIP [ MICROCHIP ]
