KSZ8041NL/RNL
The KSZ8041NL inputs the 50-MHz REF_CLK from the MAC or system board.
The KSZ8041RNL generates the 50MHz RMII REF_CLK and outputs it to the MAC.
3.14.2
TRANSMIT ENABLE (TX_EN)
TX_EN indicates that the MAC is presenting di-bits on TXD[1:0] for transmission. It is asserted synchronously with the
first nibble of the preamble and remains asserted while all di-bits to be transmitted are presented on the RMII, and is
negated prior to the first REF_CLK following the final di-bit of a frame.
TX_EN transitions synchronously with respect to REF_CLK.
3.14.3
TRANSMIT DATA [1:0] (TXD[1:0])
TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] is accepted for trans-
mission by the PHY. TXD[1:0] is “00” to indicate idle when TX_EN is deasserted. Values other than “00” on TXD[1:0]
while TX_EN is deasserted are ignored by the PHY.
3.14.4
CARRIER SENSE/RECEIVE DATA VALID (CRS_DV)
CRS_DV is asserted by the PHY when the receive medium is non-idle. It is asserted asynchronously on detection of a
carrier. This is when a squelch is passed in 10 Mbps mode, and when two non-contiguous zeros in 10 bits are detected
in 100 Mbps mode. Loss of carrier results in the deassertion of CRS_DV.
As long as carrier detection criteria are met, CRS_DV remains asserted continuously from the first recovered di-bit of
the frame through the final recovered di-bit, and it is negated prior to the first REF_CLK that follows the final di-bit. The
data on RXD[1:0] is considered valid once CRS_DV is asserted. However, since the assertion of CRS_DV is asynchro-
nous relative to REF_CLK, the data on RXD[1:0] is “00” until proper receive signal decoding takes place.
3.14.5
RECEIVE DATA [1:0] (RXD[1:0])
RXD[1:0] transitions synchronously to REF_CLK. For each clock period in which CRS_DV is asserted, RXD[1:0] trans-
fers two bits of recovered data from the PHY. RXD[1:0] is “00” to indicate idle when CRS_DV is deasserted. Values other
than “00” on RXD[1:0] while CRS_DV is deasserted are ignored by the MAC.
3.14.6
RECEIVE ERROR (RX_ER)
RX_ER is asserted for one or more REF_CLK periods to indicate that a Symbol Error (for example,. a coding error that
a PHY is capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere
in the frame presently being transferred from the PHY.
RX_ER transitions synchronously with respect to REF_CLK. While CRS_DV is deasserted, RX_ER has no effect on the
MAC.
3.14.7
COLLISION DETECTION
The MAC regenerates the COL signal of the MII from TX_EN and CRS_DV.
2017 Microchip Technology Inc.
DS00002245B-page 23
MICROCHIP [ MICROCHIP ]
