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DSPIC33FJ128GP306 参数 Datasheet PDF下载

DSPIC33FJ128GP306图片预览
型号: DSPIC33FJ128GP306
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存编程规范 [Flash Programming Specification]
分类和应用: 闪存
文件页数/大小: 80 页 / 943 K
品牌: MICROCHIP [ MICROCHIP ]
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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION  
In addition to code memory protection, a part of Data  
RAM can be configured to be accessible only by code  
resident in the Boot Segment and/or Secure Segment.  
The sizes of these “reserved” sections are user-config-  
urable, using the RBS<1:0> and RSS<1:0> bits.  
3.6.5  
USER UNIT ID  
The dsPIC33F/PIC24H devices provide four 8-bit Con-  
figuration registers (FUID0 through FUID3) for the user  
to store product-specific information, such as unit serial  
numbers and other product manufacturing data.  
Note:  
All bits in the FBS, FSS and FGS Configu-  
ration registers can only be programmed  
to a value of ‘0’. the ERASEBcommand is  
the only way to reprogram code-protect  
bits from ON (‘0’) to OFF (‘1’).  
FIGURE 3-5:  
CONFIGURATION BIT PROGRAMMING FLOW  
Start  
ConfigAddress = 0xF80000  
Send PROGC  
Command  
Is  
No  
PROGCresponse  
PASS?  
Yes  
Is  
No  
ConfigAddress =  
ConfigAddress + 2  
ConfigAddress  
0xF80018?  
Yes  
Failure  
Report Error  
Finish  
FIGURE 3-6:  
EXITING ENHANCED  
ICSP™ MODE  
3.7  
Exiting Enhanced ICSP Mode  
Exiting Program/Verify mode is done by removing VIH  
from MCLR, as shown in Figure 3-6. The only require-  
ment for exit is that an interval P16 should elapse  
between the last clock and program signals on PGC  
and PGD before removing VIH.  
P16  
P17  
VIH  
MCLR  
VDD  
VIH  
PGD  
PGC  
PGD = Input  
DS70152D-page 46  
Preliminary  
© 2007 Microchip Technology Inc.  
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