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DSPIC33FJ128GP306 参数 Datasheet PDF下载

DSPIC33FJ128GP306图片预览
型号: DSPIC33FJ128GP306
PDF下载: 下载PDF文件 查看货源
内容描述: 闪存编程规范 [Flash Programming Specification]
分类和应用: 闪存
文件页数/大小: 80 页 / 943 K
品牌: MICROCHIP [ MICROCHIP ]
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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION  
4.2.6  
15  
READCCOMMAND  
4.2.7  
15  
READPCOMMAND  
12 11  
8 7  
0
12 11  
8 7  
0
Opcode  
Length  
Addr_MSB  
Opcode  
Length  
Addr_MSB  
N
N
Addr_LS  
Reserved  
Addr_LS  
Field  
Description  
Field  
Description  
Opcode  
Length  
N
0x1  
0x3  
Opcode  
Length  
N
0x2  
0x4  
Number of 8-bit Configuration registers  
or Device ID registers to read (max of  
256)  
Number of 24-bit instructions to read  
(max of 32768)  
Addr_MSB MSB of 24-bit source address  
Reserved  
Addr_MSB  
Addr_LS  
0x0  
Addr_LS  
Least Significant 16 bits of 24-bit  
source address  
MSB of 24-bit source address  
Least Significant 16 bits of 24-bit  
source address  
The READCcommand instructs the programming exec-  
utive to read N Configuration registers or Device ID  
registers, starting from the 24-bit address specified by  
Addr_MSB and Addr_LS. This command can only be  
used to read 8-bit or 16-bit data.  
The READPcommand instructs the programming exec-  
utive to read N 24-bit words of code memory, starting  
from the 24-bit address specified by Addr_MSB and  
Addr_LS. This command can only be used to read 24-  
bit data. All data returned in the response to this com-  
mand uses the packed data format described in  
Section 4.2.2 “Packed Data Format”.  
When this command is used to read Configuration  
registers, the upper byte in every data word returned by  
the programming executive is 0x00 and the lower byte  
contains the Configuration register value.  
Expected Response (2 + 3 * N/2 words for N even):  
0x1200  
2 + 3 * N/2  
Expected Response (4 + 3 * (N – 1)/2 words  
for N odd):  
0x1100  
Least significant program memory word 1  
2 + N  
...  
Configuration register or Device ID Register 1  
Least significant data word N  
...  
Expected Response (4 + 3 * (N – 1)/2 words  
for N odd):  
Configuration register or Device ID Register N  
0x1200  
4 + 3 * (N – 1)/2  
Least significant program memory word 1  
...  
Note:  
Reading unimplemented memory will  
cause the programming executive to  
reset. Please ensure that only memory  
locations present on a particular device  
are accessed.  
MSB of program memory word N (zero padded)  
Note:  
Reading unimplemented memory will  
cause the programming executive to  
reset. Please ensure that only memory  
locations present on a particular device  
are accessed.  
DS70152D-page 50  
Preliminary  
© 2007 Microchip Technology Inc.  
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