28. Instruction Set Summary
Mnemonics
Operands
Description
Operation
Flags
#Clocks
Arithmetic and Logic Instructions
ADD
ADC
Rd, Rr
Rd, Rr
Rdl,K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rdl,K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Add two registers
Add with carry two registers
Add immediate to word
Subtract two registers
Subtract constant from register
Subtract with carry two registers
Subtract with carry constant from register
Subtract immediate from word
Logical AND registers
Logical AND register and constant
Logical OR registers
Rd Rd + Rr
Rd Rd + Rr + C
Rdh:Rdl Rdh:Rdl + K
Rd Rd – Rr
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,N,V
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
ADIW
SUB
SUBI
Rd Rd – K
SBC
Rd Rd – Rr – C
Rd Rd – K – C
Rdh:Rdl Rdh:Rdl – K
Rd Rd Rr
SBCI
SBIW
AND
ANDI
OR
Rd Rd K
Z,N,V
Rd Rd v Rr
Z,N,V
ORI
Logical OR register and constant
Exclusive OR registers
One’s complement
Rd Rd v K
Z,N,V
EOR
Rd Rd Rr
Z,N,V
COM
Rd 0xFF – Rd
Rd 0x00 – Rd
Rd Rd v K
Z,C,N,V
Z,C,N,V,H
Z,N,V
NEG
Rd
Two’s complement
SBR
Rd,K
Rd,K
Rd
Set bit(s) in register
CBR
Clear bit(s) in register
Rd Rd (0xFF – K)
Rd Rd + 1
Z,N,V
INC
Increment
Z,N,V
DEC
Rd
Decrement
Rd Rd – 1
Z,N,V
TST
Rd
Test for zero or minus
Rd Rd Rd
Z,N,V
CLR
Rd
Clear register
Rd Rd Rd
Z,N,V
SER
Rd
Set register
Rd 0xFF
None
MUL
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Multiply unsigned
R1:R0 Rd Rr
R1:R0 Rd Rr
R1:R0 Rd Rr
R1:R0 (Rd x Rr) << 1
R1:R0 (Rd x Rr) << 1
R1:R0 (Rd x Rr) << 1
Z,C
MULS
MULSU
FMUL
FMULS
FMULSU
Branch Instructions
RJMP
IJMP
Multiply signed
Z,C
Multiply signed with unsigned
Fractional multiply unsigned
Fractional multiply signed
Fractional multiply signed with unsigned
Z,C
Z,C
Z,C
Z,C
k
Relative jump
Indirect jump to (Z)
PC PC + k + 1
PC Z
None
None
2
2
JMP(*)
RCALL
ICALL
CALL(*)
RET
k
k
Direct jump
PC k
None
3
Relative subroutine call
Indirect call to (Z)
PC PC + k + 1
PC Z
None
3
None
3
4
k
Direct subroutine call
Subroutine return
PC k
None
PC STACK
None
4
RETI
Interrupt return
PC STACK
I
4
CPSE
CP
Rd,Rr
Rd,Rr
Rd,Rr
Rd,K
Rr, b
Rr, b
P, b
Compare, skip if equal
Compare
if (Rd = Rr) PC PC + 2 or 3
Rd – Rr
None
1/2/3
1
Z, N,V,C,H
Z, N,V,C,H
Z, N,V,C,H
None
CPC
Compare with carry
Compare register with immediate
Skip if bit in register cleared
Skip if bit in register is set
Skip if bit in I/O register cleared
Rd – Rr – C
1
CPI
Rd - K
1
SBRC
SBRS
SBIC
if (Rr(b)=0) PC PC + 2 or 3
if (Rr(b)=1) PC PC + 2 or 3
if (P(b)=0) PC PC + 2 or 3
1/2/3
1/2/3
1/2/3
None
None
Note:
1. These Instructions are only available in “16K and 32K parts”
296
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
