TS_Offset is the signed twos complement 7-bit temperature sensor offset reading stored as previously in the signature row
at address 0x0005.
See section 24.7.10 in the ATmega32M1 Automotive datasheet for details of reading the signature row.
18.9 ADC Register Description
The ADC of the ATmega16/32/64/M1/C1 is controlled through 3 different registers. The ADCSRA and The ADCSRB
registers which are the ADC control and status registers, and the ADMUX which allows to select the Vref source and the
channel to be converted.
The conversion result is stored on ADCH and ADCL register which contain respectively the most significant bits and the less
significant bits.
18.9.1 ADC Multiplexer Register – ADMUX
Bit
7
REFS1
R/W
0
6
5
4
3
MUX3
R/W
0
2
MUX2
R/W
0
1
MUX1
R/W
0
0
MUX0
R/W
0
REFS0 ADLAR
MUX4
ADMUX
Read/Write
Initial Value
R/W
0
R/W
0
-
0
• Bit 7, 6 – REFS1, 0: ADC Vref Selection Bits
These 2 bits determine the voltage reference for the ADC.
The different setting are shown in Table 18-4.
Table 18-4. ADC Voltage Reference Selection
AREFEN
ISRCEN
REFS1
REFS0
Description
1
1
0
1
0
0
0
0
0
0
0
1
0
1
1
0
External Vref on AREF pin, Internal Vref is switched off
AVcc with external capacitor connected on the AREF pin
AVcc (no external capacitor connected on the AREF pin)
Reserved
Internal 2.56V reference voltage with external capacitor connected
on the AREF pin
1
0
0
x
1
1
1
1
Internal 2.56V reference voltage
If bits REFS1 and REFS0 are changed during a conversion, the change will not take effect until this conversion is complete
(it means while the ADIF bit in ADCSRA register is set).
In case the internal Vref is selected, it is turned ON as soon as an analog feature needed it is set.
• Bit 5 – ADLAR: ADC Left Adjust Result
Set this bit to left adjust the ADC result.
Clear it to right adjust the ADC result.
The ADLAR bit affects the configuration of the ADC result data registers. Changing this bit affects the ADC data registers
immediately regardless of any on going conversion. For a complete description of this bit, see Section “ADC Result Data
Registers – ADCH and ADCL”, page 213.
• Bit 4, 2, 1, 0 – MUX4, MUX3, MUX2, MUX1, MUX0: ADC Channel Selection Bits
These 4 bits determine which analog inputs are connected to the ADC input. The different setting are shown in Table 18-5 on
page 211.
210
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
