Figure 14-3. Cycle Presentation in Centered Mode
One PSC Cycle
PSC Counter Value
Update
Figure 14-2 on page 118 and Figure 14-3 graphically illustrate the values held in the PSC counter. Centered Mode is like one
ramp mode which counts down and then up.
Notice that the update of the waveform generator registers is done regardless of ramp mode at the end of the PSC cycle.
14.5.3 Operation Mode Descriptions
Waveforms and duration of output signals are determined by parameters held in the registers (POCRnSA, POCRnRA,
POCRnSB, POCR_RB) and by the running mode. Two modes are possible:
●
One ramp mode: In this mode, all the 3 PSCOUTnB outputs are edge-aligned and the 3 PSCOUTnA can be also
edge-aligned when setting the same values in the dedicated registers.
In this mode, the PWM frequency is twice the center aligned mode PWM frequency.
●
Center aligned mode: In this mode, all the 6 PSC outputs are aligned at the center of the period. Except when using
the same duty cycles on the 3 modules, the edges of the outputs are not aligned. So the PSC outputs do not commute
at the same time, thus the system which is driven by these outputs will generate less commutation noise.
In this mode, the PWM frequency is twice slower than in one ramp mode.
14.5.3.1 One Ramp Mode (Edge-Aligned)
The following figure shows the resultant outputs PSCOUTnA and PSCOUTnB operating in one ramp mode over a PSC
cycle.
Figure 14-4. PSCOUTnA and PSCOUTnB Basic Waveforms in One Ramp Mode
POCRnRB
POCRnSB
POCRnRA
PSC Counter
POCRnSA
0
On Time A
On Time B
PSCOUTnA
PSCOUTnB
Dead Time A
Dead Time B
PSC Cycle
ATmega16/32/64/M1/C1 [DATASHEET]
119
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
