On-time A = (POCRnRAH/L - POCRnSAH/L) 1/Fclkpsc
On-time B = (POCRnRBH/L - POCRnSBH/L) 1/Fclkpsc
Dead-time A = (POCRnSAH/L + 1) 1/Fclkpsc
Dead-time B = (POCRnSBH/L – POCRnRAH/L) 1/Fclkpsc
Minimal value for dead-time A = 1/Fclkpsc
If the overlap protection is disabled, in one-ramp mode, PSCOUTnA and PSCOUTnB outputs can be configured to overlap
each other, though in normal use this is not desirable.
Figure 14-5. Controlled Start and Stop Mechanism in One-Ramp Mode
POCRnRB
POCRnSB
POCRnRA
POCRnSA
PSC Counter
Run
PSCOUTnA
PSCOUTnB
Note:
See Section 14.16.8 “PSC Control Register – PCTL” on page 130 (PCCYC = 1)
14.5.3.2 Center Aligned Mode
In center aligned mode, the center of PSCOUTnA and PSCOUTnB signals are centered.
Figure 14-6. PSCOUTnA and PSCOUTnB Basic Waveforms in Center Aligned Mode
PSC Counter
POCRnRB
POCRnSB
POCRnSA
0
On Time 0
On
Time 1
On
Time 1
PSCOUTnA
PSCOUTnB
Dead Time
Dead Time
PSC Cycle
120
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15