13.6.3 Using the Output Compare Unit
Since writing TCNTn in any mode of operation will block all compare matches for one timer clock cycle, there are risks
involved when changing TCNTn when using any of the output compare channels, independent of whether the Timer/Counter
is running or not. If the value written to TCNTn equals the OCRnx value, the compare match will be missed, resulting in
incorrect waveform generation. Do not write the TCNTn equal to TOP in PWM modes with variable TOP values. The
compare match for the TOP will be ignored and the counter will continue to 0xFFFF. Similarly, do not write the TCNTn value
equal to BOTTOM when the counter is downcounting.
The setup of the OCnx should be performed before setting the data direction register for the port pin to output. The easiest
way of setting the OCnx value is to use the force output compare (FOCnx) strobe bits in normal mode. The OCnx register
keeps its value even when changing between waveform generation modes.
Be aware that the COMnx1:0 bits are not double buffered together with the compare value. Changing the COMnx1:0 bits will
take effect immediately.
13.7 Compare Match Output Unit
The Compare Output mode (COMnx1:0) bits have two functions. The waveform generator uses the COMnx1:0 bits for
defining the output compare (OCnx) state at the next compare match. Secondly the COMnx1:0 bits control the OCnx pin
output source. Figure 13-5 shows a simplified schematic of the logic affected by the COMnx1:0 bit setting. The I/O registers,
I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O port control registers (DDR and PORT)
that are affected by the COMnx1:0 bits are shown. When referring to the OCnx state, the reference is for the internal OCnx
register, not the OCnx pin. If a system reset occur, the OCnx register is reset to “0”.
Figure 13-5. Compare Match Output Unit, Schematic
COMnx1
COMnx0
FOCnx
Waveform
Generator
D
D
Q
Q
1
0
OCnx
Pin
OCnx
PORT
D
Q
DDR
clkI/O
The general I/O port function is overridden by the output compare (OCnx) from the waveform generator if either of the
COMnx1:0 bits are set. However, the OCnx pin direction (input or output) is still controlled by the Data Direction Register
(DDR) for the port pin. The data direction register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx
value is visible on the pin. The port override function is generally independent of the waveform generation mode, but there
are some exceptions. Refer to Table 13-1, Table 13-2 and Table 13-3 on page 111 for details.
The design of the Output Compare pin logic allows initialization of the OCnx state before the output is enabled. Note that
some COMnx1:0 bit settings are reserved for certain modes of operation. See Section 13.10 “16-bit Timer/Counter Register
Description” on page 110.
The COMnx1:0 bits have no effect on the input capture unit.
ATmega16/32/64/M1/C1 [DATASHEET]
101
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
