Write Sequence (WRITE): In order to program the AT25128B/256B, the Write Protect pin (WP) must be held
high and two separate instructions must be executed. First, the device must be write enabled via the WREN
instruction. Then a Write (WRITE) instruction may be executed. Also, the address of the memory location(s) to
be programmed must be outside the protected address field location selected by the Block Write Protection
level. During an internal write cycle, all commands will be ignored except the RDSR instruction.
A Write instruction requires the following sequence. After the CS line is pulled low to select the device, the Write
opcode is transmitted via the SI line followed by the byte address and the data (D7 D0) to be programmed
(see Table 6-6 for the address key). Programming will start after the CS pin is brought high. The low-to-high
transition of the CS pin must occur during the SCK low time immediately after clocking in the D0 (LSB) data bit.
The Ready/Busy status of the device can be determined by initiating a Read Status Register (RDSR)
instruction. If Bit 0 is one, the write cycle is still in progress. If Bit 0 is zero, the write cycle has ended. Only the
RDSR instruction is enabled during the write programming cycle.
The AT25128B/256B is capable of an 64-byte Page Write operation. After each byte of data is received, the six
low-order address bits are internally incremented by one; the high-order bits of the address will remain constant.
If more than 64 bytes of data are transmitted, the address counter will roll-over, and the previously written data
will be overwritten. The AT25128B/256B is automatically returned to the Write Disable state at the completion of
a write cycle.
Note: If the WP pin is brought low or if the device is not Write Enabled (WREN), the device will ignore the Write
instruction and will return to the standby state, when CS is brought high. A new CS falling edge is
required to reinitiate the serial communication.
Table 6-6.
Address Key
Address
AN
AT25128B
A13 – A0
AT25256B
A14 – A0
A15
Don’t Care Bits
A15 – A14
10
AT25128B/256B [DATASHEET]
Atmel-8698E-SEEPROM-AT25128B-256B-Datasheet_012015