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AT25256B-SSHL-T-537 参数 Datasheet PDF下载

AT25256B-SSHL-T-537图片预览
型号: AT25256B-SSHL-T-537
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 32KX8, Serial, CMOS, PDSO8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 42 页 / 1320 K
品牌: MICROCHIP [ MICROCHIP ]
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AT25128B/AT25256B  
Electrical Characteristics  
4.5  
SPI Synchronous Data Timimg  
tCS  
VIH  
CS  
VIL  
tCSS  
tCSH  
VIH  
tWH  
tWL  
SCK  
VIL  
tSU  
tH  
VIH  
VIL  
SI  
Valid Data In  
tHO  
tDIS  
tV  
VOH  
High  
High  
SO  
Impedance  
Impedance  
VOL  
4.6  
Electrical Specifications  
4.6.1  
Power-Up Requirements and Reset Behavior  
During a power-up sequence, the VCC supplied to the AT25128B/AT25256B should monotonically rise  
from GND to the minimum VCC level, as specified in Table 4-1, with a slew rate no faster than 0.1 V/µs.  
4.6.1.1 Device Reset  
To prevent inadvertent write operations or any other spurious events from occurring during a power-up  
sequence, the AT25128B/AT25256B includes a Power-on Reset (POR) circuit. Upon power-up, the  
device will not respond to any instructions until the VCC level crosses the internal voltage threshold (VPOR  
that brings the device out of Reset and into Standby mode.  
)
The system designer must ensure the instructions are not sent to the device until the VCC supply has  
reached a stable value greater than or equal to the minimum VCC level. Additionally, once the VCC is  
greater than or equal to the minimum VCC level, the bus master must wait at least tPUP before sending the  
first instruction to the device. See Table 4-4 for the values associated with these power-up parameters.  
Table 4-4.ꢀPower-Up Conditions(1)  
Symbol  
Parameter  
Min. Max. Units  
tPUP  
Time required after VCC is stable before the device can accept instructions 100  
1.5  
µs  
V
VPOR Power-on Reset Threshold Voltage  
tPOFF Minimum time at VCC = 0V between power cycles  
0.03  
ms  
Note:ꢀ  
1. These parameters are characterized but they are not 100% tested in production.  
If an event occurs in the system where the VCC level supplied to the AT25128B/AT25256B drops below  
the maximum VPOR level specified, it is recommended that a full-power cycle sequence be performed by  
first driving the VCC pin to GND in less than 1 ms, waiting at least the minimum tPOFF time and then  
performing a new power-up sequence in compliance with the requirements defined in this section.  
DS20006193A-page 13  
© 2019 Microchip Technology Inc.