25AA1024/25LC1024
2.3
Write Enable (WREN) and Write
Disable (WRDI)
The following is a list of conditions under which the
write enable latch will be reset:
•
•
•
•
•
•
•
Power-up
WRDI
instruction successfully executed
WRSR
instruction successfully executed
WRITE
instruction successfully executed
PE
instruction successfully executed
SE
instruction successfully executed
CE
instruction successfully executed
The 25XX1024 contains a write enable latch. See
This latch must be set before any write operation will be
completed internally. The
WREN
instruction will set the
latch, and the
WRDI
will reset the latch.
FIGURE 2-4:
WRITE ENABLE SEQUENCE (WREN)
CS
0
SCK
1
2
3
4
5
6
7
SI
0
0
0
0
0
1
1
0
SO
High-Impedance
FIGURE 2-5:
WRITE DISABLE SEQUENCE (WRDI)
CS
0
SCK
1
2
3
4
5
6
7
SI
0
0
0
0
0
1
0
1
0
High-Impedance
SO
DS21836D-page 10
Preliminary
©
2007 Microchip Technology Inc.