欢迎访问ic37.com |
会员登录 免费注册
发布采购

25LC1024-I/SM 参数 Datasheet PDF下载

25LC1024-I/SM图片预览
型号: 25LC1024-I/SM
PDF下载: 下载PDF文件 查看货源
内容描述: 1兆位的SPI总线串行EEPROM [1 Mbit SPI Bus Serial EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 30 页 / 573 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
 浏览型号25LC1024-I/SM的Datasheet PDF文件第2页浏览型号25LC1024-I/SM的Datasheet PDF文件第3页浏览型号25LC1024-I/SM的Datasheet PDF文件第4页浏览型号25LC1024-I/SM的Datasheet PDF文件第5页浏览型号25LC1024-I/SM的Datasheet PDF文件第7页浏览型号25LC1024-I/SM的Datasheet PDF文件第8页浏览型号25LC1024-I/SM的Datasheet PDF文件第9页浏览型号25LC1024-I/SM的Datasheet PDF文件第10页  
25AA1024/25LC1024
2.0
2.1
FUNCTIONAL DESCRIPTION
Principles of Operation
BLOCK DIAGRAM
STATUS
Register
HV Generator
The 25XX1024 is a 131,072 byte Serial EEPROM
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC
®
microcontrollers. It may also interface with microcon-
trollers that do not have a built-in SPI port by using
discrete I/O lines programmed properly in firmware to
match the SPI protocol.
The 25XX1024 contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
bytes and format for device operation. All instructions,
addresses and data are transferred MSB first, LSB last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25XX1024 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
I/O Control
Logic
Memory
Control
Logic
X
Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
V
CC
V
SS
Y Decoder
Sense Amp.
R/W Control
TABLE 2-1:
READ
WRITE
WREN
WRDI
RDSR
WRSR
PE
SE
CE
RDID
DPD
INSTRUCTION SET
Instruction Format
0000 0011
0000 0010
0000 0110
0000 0100
0000 0101
0000 0001
0100 0010
1101 1000
1100 0111
1010 1011
1011 1001
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Set the write enable latch (enable write operations)
Reset the write enable latch (disable write operations)
Read STATUS register
Write STATUS register
Page Erase – erase one page in memory array
Sector Erase – erase one sector in memory array
Chip Erase – erase all sectors in memory array
Release from Deep power-down and read electronic signature
Deep Power-Down mode
Instruction Name
DS21836D-page 6
Preliminary
©
2007 Microchip Technology Inc.