25AA1024/25LC1024
Read Sequence
The device is selected by pulling CS low. The 8-bit
READ
instruction is transmitted to the 25XX1024
followed by the 24-bit address, with seven MSBs of the
address being “don’t care” bits. After the correct
READ
instruction and address are sent, the data stored in the
memory at the selected address is shifted out on the
SO pin.
The data stored in the memory at the next address can
be read sequentially by continuing to provide clock
pulses. The internal Address Pointer is automatically
incremented to the next higher address after each byte
of data is shifted out. When the highest address is
reached (1FFFFh), the address counter rolls over to
address, 00000h, allowing the read cycle to be contin-
ued indefinitely. The read operation is terminated by
raising the CS pin (Figure 2-1).
FIGURE 2-1:
CS
0
SCK
1
2
READ SEQUENCE
3
4
5
6
7
8
9 10 11
29 30 31 32 33 34 35 36 37 38 39
Instruction
SI
0
0
0
0
0
0
1
24-bit Address
1
23 22 21 20
2
1
0
Data Out
7
6
5
4
3
2
1
0
High-Impedance
SO
©
2007 Microchip Technology Inc.
Preliminary
DS21836D-page 7
MICROCHIP [ MICROCHIP TECHNOLOGY ]
