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24LC64 参数 Datasheet PDF下载

24LC64图片预览
型号: 24LC64
PDF下载: 下载PDF文件 查看货源
内容描述: 64K I 2 C ⑩ CMOS串行EEPROM [64K I 2 C ⑩ CMOS Serial EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 12 页 / 184 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号24LC64的Datasheet PDF文件第2页浏览型号24LC64的Datasheet PDF文件第3页浏览型号24LC64的Datasheet PDF文件第4页浏览型号24LC64的Datasheet PDF文件第5页浏览型号24LC64的Datasheet PDF文件第7页浏览型号24LC64的Datasheet PDF文件第8页浏览型号24LC64的Datasheet PDF文件第9页浏览型号24LC64的Datasheet PDF文件第10页  
24AA64/24LC64  
FIGURE 5-1: CONTROL BYTE FORMAT  
5.0  
DEVICE ADDRESSING  
A control byte is the first byte received following the  
start condition from the master device (Figure 5-1).The  
control byte consists of a four bit control code; for the  
24xx64 this is set as 1010 binary for read and write  
operations. The next three bits of the control byte are  
the chip select bits (A2, A1, A0). The chip select bits  
allow the use of up to eight 24xx64 devices on the  
same bus and are used to select which device is  
accessed. The chip select bits in the control byte must  
correspond to the logic levels on the corresponding A2,  
A1, and A0 pins for the device to respond. These bits  
are in effect the three most significant bits of the word  
address.  
Read/Write Bit  
Chip Select  
Control Code  
Bits  
S
1
0
1
0
A2 A1 A0 R/W ACK  
Slave Address  
Acknowledge Bit  
Start Bit  
The last bit of the control byte defines the operation to  
be performed. When set to a one a read operation is  
selected, and when set to a zero a write operation is  
selected. The next two bytes received define the  
address of the first data byte (Figure 5-2). Because  
only A12...A0 are used, the upper three address bits  
are don’t care bits. The upper address bits are trans-  
ferred first, followed by the less significant bits.  
5.1  
Contiguous Addressing Across  
Multiple Devices  
The chip select bits A2, A1, A0 can be used to expand  
the contiguous address space for up to 512K bits by  
adding up to eight 24xx64's on the same bus. In this  
case, software can use A0 of the control byte as  
address bit A13, A1 as address bit A14, and A2 as  
address bit A15. It is not possible to sequentially read  
across device boundaries.  
Following the start condition, the 24xx64 monitors the  
SDA bus checking the device type identifier being  
transmitted. Upon receiving a 1010 code and appropri-  
ate device select bits, the slave device outputs an  
acknowledge signal on the SDA line. Depending on the  
state of the R/W bit, the 24xx64 will select a read or  
write operation.  
FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS  
CONTROL BYTE  
ADDRESS HIGH BYTE  
ADDRESS LOW BYTE  
A
A
2
A
1
A
0
A
A
10  
A
9
A
8
A
7
A
0
1
0
1
0
R/W  
X
X
X
12 11  
CONTROL  
CODE  
CHIP  
SELECT  
BITS  
X = Don’t Care Bit  
DS21189B-page 6  
1998 Microchip Technology Inc.  
 
 
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