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MX26L3220XBI-12 参数 Datasheet PDF下载

MX26L3220XBI-12图片预览
型号: MX26L3220XBI-12
PDF下载: 下载PDF文件 查看货源
内容描述: 32M - BIT [2M ×16 ]的CMOS多重一次性可编程EPROM [32M-BIT [2M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM]
分类和应用: 闪存存储内存集成电路可编程只读存储器电动程控只读存储器
文件页数/大小: 38 页 / 1135 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX26L3220  
If this time-out condition occurs during chip erase opera-  
tion, it specifies that Device is bad and it may not be  
reused. Write the Reset command sequence to the de-  
vice, and then execute program or erase command se-  
quence. This allows the system to continue to use the  
other active sectors in the device.  
Q7: Data Polling  
The Data Polling bit, Q7, indicates to the host system  
whether an Automatic Algorithm is in progress or com-  
pleted. Data Polling is valid after the rising edge of the  
final WE pulse in the program or erase command se-  
quence.  
If this time-out condition occurs during the chip erase  
operation, it specifies that the entire chip is bad.  
During the Automatic Program algorithm, the device out-  
puts on Q7 the complement of the datum programmed  
to Q7.This Q7 status also applies to programming dur-  
ing Er ase Suspend.When the Automatic Program algo-  
rithm is complete, the device outputs the datum pro-  
grammed to Q7.The system must provide the program  
address to read valid status information on Q7.  
If this time-out condition occurs during the word program-  
ming operation, the word is bad and maynot be reused,  
(other word are still functional and can be reused).  
During the Automatic Erase algorithm, Data Polling pro-  
duces a "0" on Q7.When the Automatic Erase algorithm  
is complete. Data Polling produces a "1" on Q7. This is  
analogous to the complement/true datum out-put de-  
scribed for the Automatic Program algorithm: the erase  
function changes all the bits to "1" prior to this, the de-  
vice outputs the "complement,or "0".”  
Q6:Toggle BIT I  
Toggle Bit I on Q6 indicates whether an Automatic Pro-  
gram or Erase algorithm is in progress or complete.Toggle  
Bit I may be read at any address, and is valid after the  
rising edge of the final WE or CE, whichever happens  
first pulse in the command sequence(prior to the pro-  
gram or erase operation).  
During an Automatic Program or Erase algorithm opera-  
tion, successive read cycles to any address cause Q6  
to toggle. The system may use either OE or CE to con-  
trol the read cycles.When the operation is complete, Q6  
stops toggling.  
Q5:Program/Erase Timing  
Q5 will indicate if the program or erase time has exceeded  
the specified limits(internal pulse count). Under these  
conditions Q5 will produce a "1". This time-out condition  
indicates that the program or erase cycle was not suc-  
cessfully completed. Data Polling andToggle Bit are the  
only operating functions of the device under this condi-  
tion.  
P/N:PM0826  
REV. 0.5, JAN. 29, 2002  
13  
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