MX25L1635D
COMMAND DESCRIPTION
Table 5. Command Set
COMMAND W REN
W RDI
(write
disable)
RDID (read
identification) status
register)
RDSR (read W RSR
READ (read FAST
2READ (2 4READ (4
(byte)
(write
(write status data)
register)
READ (fast x I/O read x I/O read
read data)
enable)
command) command)
Note1
1st byte
2nd byte
06 (hex) 04 (hex)
9F (hex)
05 (hex)
01 (hex)
Values
03 (hex)
0B (hex)
AD1
BB (hex)
ADD(2)
EB (hex)
AD1(A23-
A16)
AD2 (A15- AD2
A8)
AD3 (A7-
A0)
ADD(4) &
Dummy(4)
Dummy(4)
3rd byte
4th byte
ADD(2) &
Dummy(2)
AD3
5th byte
Action
Dummy
sets the resets the outputs
to read out to write new n bytes
JEDEC ID: 1- the values values to the read out
byte of the
manufacturer status
n bytes
n bytes
n bytes
(W EL)
write
(W EL)
write
read out
until CS#
goes high
read out by read out by
2 x I/O until 4 x I/O until
CS# goes CS# goes
status
register
until CS#
goes high
enable
latch bit
enable
latch bit
ID & 2-byte
device ID
register
high
high
COMMAND 4PP (quad SE (sector BE (block CE (chip PP (Page CP
DP (Deep RDP
program) (Continuou power (Release
from deep ID)
RES (read Release
(byte)
page
erase)
erase)
erase)
electronic
Read
program)
sly
down)
Enhanced
program
mode)
power
down)
1st byte
38 (hex)
AD1
20 (hex)
D8 (hex) 60 or C7 02 (hex)
(hex)
AD (hex)
B9 (hex)
AB (hex)
AB (hex)
FFh (hex)
2nd byte
3rd byte
4th byte
Action
AD1
AD2
AD3
AD1
AD2
AD3
AD1
AD2
AD3
AD1
AD2
AD3
x
x
x
x
x
x
quad input to erase
to program the
the selected selected
to erase to erase to
continously enters
program
whole chip, down mode power
release
to read out All these
the
whole
program
the
selected
page
deep power from deep 1-byte
device ID
commands
FFh,00h,AA
h or 55h will
escape the
performance
enhance
selected chip
block
page
sector
the
down mode
address is
automatical
ly increase
mode.
COMMAND REMS (read REMS2
REMS4
(read ID for
ENSO
(enter
EXSO (exit RDSCUR WRSCUR ESRY
DSRY
(disable
SO to
(byte)
electronic
(read ID for
secured
OTP)
(read
security
(write
security
(enable
SO to
manufacturer 2x I/O mode) 4x I/O mode) secured
& device ID)
OTP)
register) register)
2B (hex) 2F (hex)
output
RY/BY#)
output
RY/BY#)
1st byte
2nd byte
3rd byte
4th byte
Action
90 (hex)
EF (hex)
DF (hex)
B1 (hex) C1 (hex)
70 (hex)
80 (hex)
x
x
x
x
x
x
ADD (Note 2) ADD (Note 2) ADD (Note 2)
output the output the output the
manufacturer manufacturer manufacturer the 512-bit 512-bit
ID & device
ID
to enter
to exit the to read
to set the to enable to disable
value of
security
lock-down SO to
bit as "1" output
SO to
output
RY/BY#
ID & device ID & device secured
ID
secured
ID
OTP
OTP mode register
(once
RY/BY#
mode
lock-down, during CP during CP
cannot be mode
updated)
mode
Note 1: The count base is 4-bit for ADD(2) and Dummy(2) because of 2 x I/O. And the MSB is on SI/SIO1 which is different from
1 x I/O condition.
Note 2: ADD=00H will output the manufacturer ID first and ADD=01H will output device ID first.
Note 3: It is not recommended to adopt any other code not in the command definition table, which will potentially enter the hidden
mode.
P/N:PM1374
REV. 1.5, OCT. 01, 2008
14
Macronix [ MACRONIX INTERNATIONAL ]
