ADVANCED INFORMATION
MX10L8050X
SINGLE-CHIP 8-BIT MICROCONTROLLER
FEATURE
• High performance CMOS ROM CPU
• Low Voltage Operation (2.7V~5.5V)
• Up to 40MHz operation (3.5MHz to 40MHz)
• Three 16-bit timer/counters
• 256 Bytes of on-chip data RAM
• 64 Kbytes on-chip Program memory
• 32 Programmable I/O lines
• ROMcodeprotection
• Two priority levels
• Power saving Idle and power down modes
• 64 K external program memory space
• 64 K external data memory space
• Available in PLCC, PQFP, and PDIP package
• Four 8-bit I/O ports
• On-chip Watch-Dog-Timer (WDT)
• 6 interrupt Sources
• Full-duplexenhancedUARTcompatiblewiththestan-
dard 80C51 and the 80C52
• Extended Temperature Range (-40°C to +85°C)
GENERAL DESCRIPTION
The single-chip 8-bit microcontroller is manufactured in
MXIC's advanced CMOS process. This device uses the
same powerful instruction set, has the same architec-
ture, and is pin-to-pin compatible with the existing 80C51.
The added features make it an even more powerful
microcontroller for applications that require clock out-
put, and up/down counting capabilities such as motor
control. It also has a more versatile serial channel that
facilitates multi-processor communications.
PIN CONFIGURATIONS
44 PLCC
VCC
40 PDIP
(T2) P1.0
(T2EX) P1.1
P1.2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA
2
6
1
44
40
39
3
P0.4
P0.5
P0.6
P0.7
EA
P1.5
P1.6
P1.7
RST
P3.0
N.C.
P3.1
P3.2
P3.3
P3.4
P3.5
7
P1.3
4
P1.4
5
P1.5
6
P1.6
7
P1.7
8
RESET
(RXD) P3.0
(TXD)P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
XTAL2
9
N.C.
ALE
PSEN
P2.7
P2.6
P2.5
12
34
MX10L8050X
10
11
12
13
14
15
16
17
18
19
20
ALE
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)
17
29
28
18
23
XTAL1
VSS
44 PQFP
34
33
44
P1.5
P1.6
P1.7
RST
P3.0
N.C.
P3.1
P3.2
P3.3
P3.4
P3.5
1
P0.4
P0.5
P0.6
P0.7
EA
N.C.
ALE
PSEN
P2.7
P2.6
P2.5
MX10L8050X
11
12
23
22
P/N:PM0803
REV. 0.0, APR. 23, 2001
1