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MAX544BESA 参数 Datasheet PDF下载

MAX544BESA图片预览
型号: MAX544BESA
PDF下载: 下载PDF文件 查看货源
内容描述: + 5V ,串行输入,电压输出, 14位DAC [+5V, Serial-Input, Voltage-Output, 14-Bit DACs]
分类和应用:
文件页数/大小: 12 页 / 265 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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+5V, Serial-Input, Voltage-Output, 14-Bit DACs  
Unbuffered Operation  
Unbuffered operation reduces power consumption as  
Applications Information  
Reference and Analog Ground Inputs  
The MAX544/MAX545 operate with external voltage ref-  
erences from ꢂV to 3V, and maintain 14-bit performance  
if certain guidelines are followed when selecting and  
applying the reference. ꢁdeally, the reference’s  
temperature coefficient should be less than 1.5ppm/°C to  
maintain 14-bit accuracy to within 1ꢀLS over the ±°C to  
+7±°C commercial temperature range. Lince this convert-  
er is designed as an inverted R-ꢂR voltage-mode DAC,  
the input resistance seen by the voltage reference is code  
dependent. The worst-case input-resistance variation is  
from 11.5k(at code 8554 hex) to ꢂ±±k(at code ±±±±  
hex). The maximum change in load current for a +ꢂ.5V  
reference is +ꢂ.5V / 11.5k= ꢂ17µA; therefore, the  
required load regulation is ꢂ8ppm/mA for a maximum  
error of ±.1ꢀLS. This implies a reference output imped-  
ance of less than 71m. ꢁn addition, the signal-path  
impedance from the voltage reference to the reference  
input must be kept low because it contributes directly to  
the load-regulation error.  
well as offset error contributed by the external output  
buffer. The R-ꢂR DAC output is available directly at  
OUT, allowing 14-bit performance from +V  
to AGID  
REF  
without degradation at zero scale. The DAC’s output  
impedance is also low enough to drive medium loads  
(R > 6±k) without degradation of ꢁIꢀ or DIꢀ; only  
the gain error is increased by externally loading the  
DAC output.  
External Output Buffer Amplifier  
The requirements on the external output buffer amplifier  
change whether the DAC is used in unipolar or bipolar  
operational mode. ꢁn unipolar mode, the output amplifi-  
er is used in a voltage-follower connection. ꢁn bipolar  
mode (MAX545 only), the amplifier operates with the  
internal scaling resistors (Figure ꢂb). ꢁn each mode, the  
DAC’s output resistance is constant and is independent  
of input code; however, the output amplifier’s input  
impedance should still be as high as possible to mini-  
mize gain errors. The DAC’s output capacitance is also  
independent of input code, thus simplifying stability  
requirements on the external amplifier.  
The requirement for a low-impedance voltage reference  
is met with capacitor bypassing at the reference inputs  
and ground. A ±.1µF ceramic capacitor with short leads  
between REFF and AGIDF (MAX545), or REF and  
AGID (MAX544), provides high-frequency bypassing.  
A surface-mount ceramic chip capacitor is preferred  
because it has the lowest inductance. An additional  
1±µF between REFF and AGIDF (MAX545), or REF  
and AGID (MAX544), provides low-frequency bypass-  
ing. A low-ELR tantalum, film, or organic semiconductor  
capacitor works well. ꢀeaded capacitors are accept-  
able because impedance is not as critical at lower fre-  
quencies. The circuit can benefit from even larger  
bypassing capacitors, depending on the stability of the  
external reference with capacitive loading. ꢁf separate  
force and sense lines are not used, tie the appropriate  
force and sense pins together close to the package.  
ꢁn bipolar mode, a precision amplifier operating with  
dual power supplies (such as the MAX4±±) provides  
the ±V  
output range. ꢁn single-supply applications,  
REF  
precision amplifiers with input common-mode ranges  
including AGID are available; however, their output  
swings do not normally include the negative rail  
(AGID) without significant degradation of performance.  
A single-supply op amp, such as the MAX405, is suit-  
able if the application does not use codes near zero.  
Lince the ꢀLSs for a 14-bit DAC are extremely small  
(15ꢂ.6µV for V  
= ꢂ.5V), pay close attention to the  
REF  
external amplifier’s input specification. The input offset  
voltage can degrade the zero-scale error and might  
require an output offset trim to maintain full accuracy if  
the offset voltage is greater than 1/ꢂꢀLS. Limilarly, the  
input bias current multiplied by the DAC output resis-  
tance (typically 6.ꢂ5k) contributes to zero-scale error.  
Temperature effects also must be taken into considera-  
tion. Over the ±°C to +7±°C commercial temperature  
range, the offset voltage temperature coefficient (refer-  
enced to +ꢂ5°C) must be less than 1.7µV/°C to add  
less than 1/ꢂꢀLS of zero-scale error. The external  
AGID must also be low impedance, as load-regulation  
errors will be introduced by excessive AGID resis-  
tance. As in all high-resolution, high-accuracy applica-  
tions, separate analog and digital ground planes yield  
the best results. Tie DGID to AGID at the AGID pin to  
form the “star” ground for the DAC system. Always refer  
remote DAC loads to this system ground for the best  
possible performance.  
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