Lo w -Vo lt a g e , P re c is io n S t e p -Do w n
Co n t ro lle r fo r P o rt a b le CP U P o w e r
MAX136
Table 6. Low-Voltage Troubleshooting Chart
SYMPTOM
CONDITION
ROOT CAUSE
SOLUTION
Increase bulk output capacitance
per formula (see Low-Voltage
Operation section). Reduce inductor
value.
Sag or droop in V
step-load change
under
Low V -V
differential, <1.5V
Limited inductor-current
slew rate per cycle.
OUT
IN OUT
Dropout voltage is too high
(V follows V as V
decreases)
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Low V -V
differential, <1V
Maximum duty-cycle limits
exceeded.
IN OUT
OUT
IN
IN
Unstable—jitters between
different duty factors and
frequencies
Low V -V
differential, <0.5V
Normal function of internal
low-dropout circuitry.
Increase the minimum input voltage
or ignore.
IN OUT
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
Use a small 20mA Schottky diode
for boost diode. Supply VL from an
external source.
Poor efficiency
Low input voltage, <5V
Won’t start under load or
quits before battery is
completely dead
Supply VL from an external source
other than V , such as the system
IN
+5V supply.
VL output is so low that it
hits the VL UVLO threshold.
Low input voltage, <4.5V
where R
is the DC resistance of the coil, R
is
dissipated in the MOSFET body diode if no external
Schottky diode is used.
DC
DS(ON)
the MOSFET on-resistance, and R
is the current-
SENSE
sense resistor value. The R
term assumes identi-
DS(ON)
2
P(cap) = input capacitor ESR loss = I
x R
ESR
RMS
cal MOSFETs for the high-side and low-side switches
because they time-share the inductor current. If the
MOSFETs are not identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
where I
is the input ripple current as calculated in
RMS
the Input Capacitor Value section.
Lig h t -Lo a d Effic ie n c y Co n s id e ra t io n s
Under light loads, the PWM operates in discontinuous
mode, where the inductor current discharges to zero at
some point during the switching cycle. This makes the
inductor current’s AC component high compared to the
PD(tran) = transition loss = V x I
x f x 3/2 x
IN
LOAD
[(V
C
/ I
) + 20ns]
IN RSS GATE
where C
is the reverse transfer capacitance of the
RSS
high-side MOSFET (a data-sheet parameter), I
the DH gate-driver peak output current (1.5A typ), and
20ns is the rise/fall time of the DH driver (20ns typ).
is
GATE
2
load current, which increases core losses and I R loss-
es in the output filter capacitors. For best light-load effi-
c ie nc y, us e MOSFETs with mod e ra te g a te -c ha rg e
levels and use ferrite, MPP, or other low-loss core mate-
ria l. Avoid p owd e re d -iron c ore s ; e ve n Kool-Mu
(aluminum alloy) is not as good as ferrite.
P(gate) = Q x f x VL
g
where VL is the internal logic-supply voltage (+5V), and
Q
is the sum of the gate-charge values for low-side
g
and high-side switches. For matched MOSFETs, Q is
twice the data-sheet value of an individual MOSFET. If
P C Bo a rd La yo u t Co n s id e ra t io n s
Good PC board layout is required in order to achieve
specified noise, efficiency, and stable performance.
The PC b oa rd la yout a rtis t mus t b e g ive n e xp lic it
instructions, preferably a pencil sketch showing the
placement of power-switching components and high-
c urre nt routing . Se e the PC b oa rd la yout in the
MAX1636 evaluation kit manual for examples. A ground
plane is essential for optimum performance. In most
applications, the circuit will be located on a multi-layer
board, and full use of the four or more copper layers
is recommended. Use the top layer for high-current
g
V
OUT
is set to less than 4.5V, replace VL in this equa-
tion with V
. In this c a s e , e ffic ie nc y c a n b e
BATT
improved by connecting VL to an efficient 5V source,
such as the system +5V supply.
P(diode) = diode conduction losses =
I
x V
x t x f
LOAD
FWD D
where t is the diode-conduction time (120ns typ), and
D
V
FWD
is the forward voltage of the diode. This power is
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
