Lo w -Vo lt a g e , P re c is io n S t e p -Do w n
Co n t ro lle r fo r P o rt a b le CP U P o w e r
that both MOSFETs are within their maximum junction
Lo w -Vo lt a g e Op e ra t io n
Low input voltages and low input-output differential
voltages each require extra care in their design. Low
absolute input voltages can cause the VL linear regula-
tor to enter dropout and eventually shut itself off. Low
temperature at high ambient temperature. The worst-
case dissipation for the high-side MOSFET occurs at
both extremes of input voltage, and the worst-case dis-
sipation for the low-side MOSFET occurs at maximum
input voltage.
V
- V
differentials can cause the output voltage to
IN
OUT
sag when the load current changes abruptly. The sag’s
amplitude is a function of inductor value and maximum
Duty = (V
+ V ) / (V - V
)
OUT
Q2
IN
Q1
d uty fa c tor (D
, a n Ele c tric a l Cha ra c te ris tic s
MAX
MAX136
parameter, 98% guaranteed over temperature at f =
200kHz) as follows:
2
PD (upper FET) = I
x R
x Duty + V
IN
x
LOAD
DS(ON)
I
x f x [(V x C
) / I
+ 20ns]
LOAD
IN
RSS
GATE
2
(I
)
x L
x D
STEP
V
=
SAG
2 x C × (V
− V
)
F
IN(MIN)
MAX
OUT
2
PD (lower FET) = I
x R
x (1 - Duty)
LOAD
DS(ON)
where on-state voltage drop V = I
x R
,
=
Table 6 is a low-voltage troubleshooting guide. The
c ure for low-volta g e s a g is to inc re a s e the outp ut
Q
LOAD
DS(ON)
GATE
C
= MOSFET reverse transfer capacitance, I
RSS
DH driver peak output current capability (1A typ), and
20ns = DH driver inherent rise/fall time. The MAX1636’s
output undervoltage shutdown protects the synchro-
nous rectifier under output short-circuit conditions. To
reduce EMI, add a 0.1µF ceramic capacitor from the
high-side switch drain to the low-side switch source.
capacitor’s value. For example, at V = +5.5V, V
=
IN
OUT
5V, L = 10µH, f = 200kHz, and I
= 3A, a total
STEP
capacitance of 660µF keeps the sag less than 200mV.
Note that only the capacitance requirement increases;
the ESR requirements do not change. Therefore, the
added capacitance can be supplied by a low-cost bulk
capacitor in parallel with the normal low-ESR capacitor.
Rectifier Clamp Diode
The rectifier is a clamp across the low-side MOSFET
that catches the negative inductor swing during the
60ns dead time between turning one MOSFET off and
each low-side MOSFET on. The latest generations of
MOSFETs inc orp ora te a hig h-s p e e d s ilic on b od y
diode, which serves as an adequate clamp diode if
efficiency is not of primary importance. A Schottky
diode can be placed in parallel with the body diode to
reduce the forward voltage drop, typically improving
efficiency 1% to 2%. Use a diode with a DC current rat-
ing equal to one-third of the load current; for example,
use an MBR0530 (500mA-rated) type for loads up to
1.5A, a 1N5819 type for loads up to 3A, or a 1N5822
type for loads up to 10A. The rectifier’s rated reverse-
breakdown voltage must be at least equal to the maxi-
mum input voltage, preferably with a 20% derating
factor.
__________Ap p lic a t io n s In fo rm a t io n
He a vy-Lo a d Effic ie n c y Co n s id e ra t io n s
The major efficiency-loss mechanisms under loads are
as follows, in the usual order of importance:
2
2
• P(I R) = I R losses
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = capacitor ESR losses
• P(IC) = los s e s d ue to the IC’s op e ra ting s up p ly
current
Ind uc tor c ore los s e s a re fa irly low a t he a vy loa d s
because the inductor’s AC current component is small.
Therefore, they are not accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can also work well.
Boost-Supply Diode
A signal diode such as a 1N4148 works well in most
applications. If the input voltage can go below +6V,
us e a s ma ll (20mA) Sc hottky d iod e for s lig htly
improved efficiency and dropout characteristics. Do
not us e la rg e p owe r d iod e s , s uc h a s 1N5817 or
1N4001, since high junction capacitance can pump up
VL to excessive voltages.
Efficiency = P
= P
/ P x 100%
IN
OUT
OUT
/ (P
+ P
) x 100%
TOTAL
OUT
2
P
= P(I R) + P(tran) + P(gate) + P(diode)
+ P(cap) + P(IC)
TOTAL
2
2
P = (I R) = (I
) x (R
+ R
+R
)
LOAD
DC
DS(ON)
SENSE
20 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
