Lo w -Vo lt a g e , P re c is io n S t e p -Do w n
Co n t ro lle r fo r P o rt a b le CP U P o w e r
MAX136
Table 5. Operating Modes
MODE
SHDN
OVP
HOW ENTERED
STATUS
NOTES
Normal operation
All circuit blocks
active
Run
High
High
VL = on
REF = off
DL = high
RESET = high-Z
(high state)
DL = high to enforce overvoltage
protection
Standby
Low
High
All circuit blocks
inactive
Shutdown
Low
Low
Lowest possible quiescent consumption
VL = on
REF = off
DL = high
RESET = low
Overvoltage
(crowbar)
Cycling SHDN or a power-on reset exits
crowbar.
High
High
V
> 7% too high
< 70% of
OUT
VL = on
V
OUT
REF = off
DL = low
RESET = low
Output
UVLO
nominal after
20–30ms timeout
expires
Cycling SHDN or a power-on reset exits
output UVLO.
High
Don’t care
VL = on
REF = off
DL = high
RESET = low
Thermal
Shutdown
Cycling SHDN or a power-on reset exits
thermal shutdown.
High
High
High
Low
T > +150°C
J
Thermal
Shutdown
All circuit blocks
inactive
Cycling SHDN or a power-on reset exits
thermal shutdown.
T > +150°C
J
flicts in systems where the output is held up by an
external source in suspend or backup mode. The OVP
pin has an internal pulldown resistor that is only turned
on during the reset phase. The OVP pin’s state is then
s a mp le d a nd s tore d inte rna lly. A floa ting OVP p in
implies no overvoltage protection.
Ou t p u t Ove rvo lt a g e P ro t e c t io n (OVP )
The overvoltage crowbar protection circuit is intended
to blow a fuse in series with the battery if the main
SMPS output rises significantly higher than its preset
level. In normal operation, the output is compared to
the internal precision reference voltage. If the output
g oe s 7% a b ove nomina l, the s ync hronous re c tifie r
MOSFET turns on 100% (the hig h-s id e MOSFET is
simultaneously forced off) in order to draw massive
amounts of battery current to blow the fuse. This safety
feature does not protect the system against a failure of
the controller IC itself but is intended primarily to guard
against a short across the high-side MOSFET. A crow-
bar event is latched and can only be reset by a rising
edge on SHDN (or by removal of the V+ supply volt-
age). The overvoltage-detection decision is made rela-
tive to the regulation point.
Bo o s t Hig h -S id e Ga t e -Drive S u p p ly (BS T)
Gate-drive voltage for the high-side N-channel switch is
generated by a flying-capacitor boost circuit (Figure 2).
The c a p a c itor b e twe e n BST a nd LX is a lte rna te ly
charged from the VL supply and placed parallel to the
high-side MOSFET's gate-source terminals.
On start-up, the synchronous rectifier (low-side MOS-
FET) forces LX to 0V and charges the boost capacitor
to 5V. On the second half-cycle, the SMPS turns on the
hig h-s id e MOSFET b y c los ing a n inte rna l s witc h
between BST and DH. This provides the necessary
enhancement voltage to turn on the high-side switch,
an action that boosts the 5V gate-drive signal above
the battery voltage.
The ove rvolta g e c omp a ra tors a re ke p t ina c tive in
standby mode. Instead, the DL driver is simply left in
the high state. However, DL does not turn on until the
output has decayed to less than 1V. This prevents con-
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