8- and 4-Channel, 3 ꢀ ꢁREF
Multirange Inputs, Serial 14-Bit ADCs
Block Diagram
DVDDO
CS
DIN
CONTROL LOGIC AND REGISTERS
AVDC2
SERIAL I/O
SSTRB
DOUT
SCLK
DGNDO
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND1
CLOCK
DVDD
ANALOG
INPUT MUX
AND
MULTIRANGE
CIRCUITRY
SAR
ADC
IN
OUT
FIFO
PGA
DGND
AVDD1
AGND3
REF
AGND2
5kΩ
4.096V
BANDGAP
REFERENCE
1x
AVDD2
AGND2
2/MAX103
MAX1032
REFCAP
REF
Pin Configurations (continued)
Chip Information
PROCESS: BiCMOS
TOP VIEW
+
AGND1
AVDD1
CH0
1
2
3
4
5
6
7
8
9
20 AGND2
19 AVDD2
18 AGND3
17 REF
CH1
MAX1033
CH2
16 REFCAP
15 DVDD
CH3
CS
14
DVDD0
DIN
13 DGND
12 DGNDO
11 DOUT
SSTRB
SCLK 10
TSSOP
30 ______________________________________________________________________________________
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
