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71M6543F/H Data Sheet
Table 4. RCMD[4:0] Bits
Command
Phase Selector
Associated TMUXRn
RCMD[4:2]
RCMD[1:0]
Control Field
---
000
001
010
011
100
Invalid
00
01
10
11
Invalid
IADC2-IADC3
Command 1
Command 2
Reserved
Reserved
Invalid
TMUXR2[2:0]
TMUXR4[2:0]
TMUXR6[2:0]
IADC4-IADC5
IADC6-IADC7
101
110
111
Reserved
Reserved
Notes:
1. Only two codes of RCMD[4:2] (SFR 0xFC[4:2]) are relevant for normal
operation. These are RCMD[4:2] = 001 and 010. Codes 000 and 101
are invalid and will be ignored if used. The remaining codes are
reserved and must not be used.
2. For the RCMD[1:0] control field, codes 01, 10 and 11 are valid and 00
is invalid and must not be used.
3. The specific phase (A, B or C) associated with each TMUXRn[2:0]
field, is determined by how the IADCn input pins are connected in the
meter design.
Table 5 shows the allowable combinations of values in RCMD[4:2] and TMUXRn[2:0], and the
corresponding data type and format sent back by the 71M6xx3 remote sensor and how the data is stored
in RMT_RD[15:8] and RMT_RD[7:0]. The MPU selects which of the three phases is read by asserting the
proper code in the RCMD[1:0] field, as shown in Table 4.
.
Table 5: Remote Interface Read Commands
Read Operation
RMT_RD [15:8]
RMT_RD [7:0]
RCMD[4:2]
TMUXRn[2:0]
TRIMT[7:0]
001
00X
TRIMT[7]=RMT_RD[8]
TRIMT[6:0]=RMT_RD[7:1]
(trim fuse for all 71M6xx3)
TRIMBGB[7:0] and
TRIMBGD[7:0]
001
11X
TRIMBGB[7:0]
TRIMBGD[7:0]
(additional trim fuses for
71M6113 and 71M6203 only)
STEMP[10:0]
STEMP[10:8]=RMT_RD[10:8]
010
010
00X
01X
10X
STEMP[7:0]
VSENSE[7:0]
All zeros
(RMT_RD[15:11] are sign extended)
(sensed 71M6xx3 temperature)
VSENSE[7:0]
All zeros
(sensed 71M6xx3 supply voltage)
VERSION[7:0]
(chip version)
010
VERSION[7:0]
Notes:
1. TRIMT[7:0] is the VREF trim value for all 71M6xx3 devices. Note that the TRIMT[7:0] 8-bit value is formed
by RMT_RD[8] and RMT_RD[7:1]. See the 71M6xxx Data Sheet for the equations related to TRIMT[7:0]
and the corresponding temperature coefficient.
2. TRIMBGB[7:0] and TRIMBGD[7:0] are trim values used for characterizing the 71M6113 (0.5%) and 71M6203
(0.1%) over temperature. See the 71M6xxx Data sheet for the equations related to TRIMBGB[7:0] and
TRIMBGD[7:0] and the corresponding temperature coefficients.
3. See 2.5.6 71M6xx3 Temperature Sensor on page 56.
4. See 2.5.8 71M6xx3 VCC Monitor on page 57.
With hardware and trim-related information on each connected 71M6xx3 Isolated Sensor available to the
71M6543, the MPU can implement temperature compensation of the energy measurement based on the
individual temperature characteristics of the 71M6xx3 Isolated Sensors. See 4.5 Metrology Temperature
Compensation for details.
Table 6 shows all I/O RAM registers used for control of the external 71M6xx3 Isolated Sensors. See the
71M6xx3 Data Sheet for additional details.
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© 2008–2011 Teridian Semiconductor Corporation
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