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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
2.3.4 Meter Equations  
The 71M6543 provides hardware assistance to the CE in order to support various meter equations. This  
assistance is controlled through I/O RAM field EQU[2:0] (equation assist, I/O RAM 0x2106[7:5]). The  
Compute Engine (CE) firmware configurations can implement the equations listed in Table 7. EQU[2:0]  
specifies the equation to be used based on the meter configuration and on the number of phases used for  
metering.  
Table 7: Inputs Selected in Multiplexer Cycles  
Wh and VARh formula  
Recommended  
Multiplexer Sequence  
Description  
EQU[2:0]*  
Element 0 Element 1 Element 2  
2
3
4
VA IA  
VB IB  
VC IC  
N/A  
N/A  
IA VA IB VB  
2-element, 3-W, 3φ Delta  
2-element, 4-W, 3φ Delta  
2-element, 4-W, 3φ Wye  
3-element, 4-W, 3φ Wye  
VA(IA-IB)/2  
IA VA IB VB IC VC  
IA VA IB VB IC VC  
IA VA IB VB IC VC (ID)  
VA(IA-IB)/2 VB(IC-IB)/2  
VA IA VB IB  
N/A  
5
VC IC  
Note:  
* Only EQU[2:0] = 5 is supported by the currently available CE code versions for the 71M6543. Contact  
your local Teridian representative for CE codes that support equations 2, 3 and 4.  
2.3.5 Real-Time Monitor (RTM)  
The CE contains a Real-Time Monitor (RTM), which can be programmed to monitor four selectable XRAM  
locations at full sample rate. The data from the four monitored locations are serially output to the TMUXOUT  
pin via the digital output multiplexer at the beginning of each CE code pass. The RTM can be enabled and  
disabled with RTM_E (I/O RAM 0x2106[1]). The RTM output clock is available on the TMUX2OUT pin. Each  
RTM word is clocked out in 35 cycles and contains a leading flag bit. See Figure 8 for the RTM output  
format. RTM is low when not in use.  
CK32  
MUX_SYNC  
MUX_STATE  
CKTEST  
RTM  
S
0
1
30 31  
0
1
30 31  
0
1
30 31  
0
1
30 31  
FLAG  
FLAG  
FLAG  
FLAG  
GN  
I
GN  
I
GN  
I
GN  
I
SB  
SB  
SB  
SB  
L
L
L
L
S
S
S
S
RTM DATA0 (32 bits)  
RTM DATA1 (32 bits)  
RTM DATA2 (32 bits)  
RTM DATA3 (32 bits)  
Figure 8: RTM Timing  
2.3.6 Pulse Generators  
The 71M6543 provides four pulse generators, VPULSE, WPULSE, XPULSE and YPULSE. The XPULSE  
and YPULSE generators are used by standard CE code to output CE status indicators, for example the  
status of the sag detection, to DIO pins. All pulses can be configured to generate interrupts to the MPU.  
The polarity of the pulses may be inverted with PLS_INV (I/O RAM 0x210C[0]). When this bit is set, the  
pulses are active high, rather than the more usual active low. PLS_INV inverts all the pulse outputs.  
The function of each pulse generator is determined by the CE code and the MPU code must configure the  
corresponding pulse outputs in agreement with the CE code. For example, standard CE code produces a  
mains zero-crossing pulse on XPULSE and a SAG pulse on YPULSE.  
26  
© 2008–2011 Teridian Semiconductor Corporation  
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