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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
A
B
A
B
A
Voutp  
Vinp  
Vinn  
+
-
B
G
A
Voutn  
B
CROSS  
Figure 6: General Topology of a Chopped Amplifier  
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as  
controlled by CROSS (an internal signal), in the A position, the output voltage is:  
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff  
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:  
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or  
Voutp – Voutn = G (Vinp – Vinn) - G Voff  
Thus, when CROSS is toggled, e.g., after each multiplexer cycle, the offset alternately appears on the  
output as positive and negative, which results in the offset effectively being eliminated, regardless of its  
polarity or magnitude.  
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the overall  
polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the amplifier’s  
offset is averaged to zero. This removes the most significant long-term drift mechanism in the voltage  
reference. The CHOP_E[1:0] (I/O RAM 0x2106[3:2]) control field controls the behavior of CROSS. On the  
first CK32 rising edge after the last multiplexer state of its sequence, the multiplexer waits one additional  
CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS is updated  
according to the CHOP_E[1:0] field. The extra CK32 cycle allows time for the chopped VREF to settle.  
During this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass through the CE  
program sequence.  
CHOP_E[1:0] has four states: positive, reverse, and two toggle states. In the positive state, CHOP_E[1:0]  
= 01, CROSS is held low. In the reverse state, CHOP_E[1:0] = 10, CROSS is held high. The two  
automatic toggling states are selected by setting CHOP_E=11 or CHOP_E=00.  
Figure 7: CROSS Signal with CHOP_E = 00  
Figure 7 shows CROSS over two accumulation intervals when CHOP_E[1:0] = 00: At the end of the  
first interval, CROSS is high, at the end of the second interval, CROSS is low. Operation with  
CHOP_E[1:0] = 00 does not require control of the chopping mechanism by the MPU.  
In the second toggle state, CHOP_E[1:0] = 11, CROSS does not toggle at the end of the last multiplexer  
cycle in an accumulation interval.  
v1.2  
© 2008–2011 Teridian Semiconductor Corporation  
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