71M6543F/H and 71M6543G/GH Data Sheet
6.4.15 ADC Converter
Table 105: ADC Converter Performance Specifications
Parameter
Condition
Min
Typ
Max
Unit
Recommended Input Range
(Vin - V3P3A)
-250
250
mV
peak
Vin = 200 mV peak,
65 Hz, on VADC8 (VA) or
VADC9 (VB) or VADC10
(VC).
Vcrosstalk = largest
measurement on IADC0-1
or IADC2-3 or IADC4-5 or
IADC6-7
Voltage to Current Crosstalk
106 *Vcrosstalk
cos(∠Vin − ∠Vcrosstalk)
Vin
-10
40
10
μV/V
(see note 1)
Input Impedance, no pre-amp
Vin=65 Hz
90
50
kΩ
ADC Gain Error vs %Power Supply
Variation
Vin=200 mV pk, 65 Hz
V3P3A=3.0 V, 3.6 V
106 ∆NoutPK 357nV /VIN
100∆V3P3A/3.3
ppm / %
Input Offset
IADC0=IADC1=V3P3A
IADC0=V3P3A
DIFF0_E=1, PRE_E=0
DIFF0_E=0, PRE_E=0
-10
-10
10
10
mV
mV
VIN = 65Hz, 250mVpk,
64kpts FFT, Blackman Harris
Window.
THD @ 250mVpk
A
B
C
D
E
F
G
H
J
A
B
C
D
E
F
G
H
J
-75
FIR_LEN
ADC_DIV
PLL_FAST
MUX_DIV
Name
A
-82
-84
-83
-86
-75
-75
-75
-75
-75
-75
-75
-75
0
1
0
1
2
0
0
1
2
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
3
2
11
6
4
2
6
3
2
B
C
dB
D
E
F
G
H
J
VIN = 65Hz, 20mVpk,
64kpts FFT, Blackman Harris
Window.
THD @ 20mVpk
A
B
C
D
E
F
G
H
J
-85
FIR_LEN
ADC_DIV
PLL_FAST
MUX_DIV
Name
-91
-85
-91
-93
-85
-85
-91
-93
A
0
1
0
1
2
0
0
1
2
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
3
2
11
6
4
2
6
3
2
B
C
D
E
F
dB
G
H
J
LSB Size:
A
B
C
D
E
F
G
H
J
3470
406
3040
357
FIR_LEN
ADC_DIV
PLL_FAST
MUX_DIV
Name
A
0
1
0
1
2
0
0
1
2
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
3
2
11
6
4
2
6
3
2
B
C
D
E
F
G
H
Vin=65Hz, 20mVpk,
64kpts FFT, Blackman-
Harris window
151
nV
3470
3040
357
J
151
A: ±91125
Digital Full-Scale:
B: ±778688
C: ±103823
D: ±884736
E: ±2097152
F: ±91125
G: ±103823
H: ±884736
J: ±2097152
FIR_LEN
ADC_DIV
PLL_FAST
MUX_DIV
Name
A
B
C
D
E
F
G
H
J
0
1
0
1
2
0
0
1
2
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
3
2
11
6
4
2
6
3
2
LSB
144
© 2008–2011 Teridian Semiconductor Corporation
v1.2
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