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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
6.4.14 71M6543 VREF  
Table 104 shows the performance specifications for the 71M6543 ADC reference voltage (VREF).  
Table 104: 71M6543 VREF Performance Specifications  
Parameter  
Condition  
TA = 22 ºC  
Min  
Typ  
Max  
Unit  
VREF output voltage,  
VREF(22)  
1.193  
1.195  
1.197  
V
VREF output voltage,  
VREF(22)  
PLL_FAST=0  
1.195  
V
mV  
VREF(CHOP=01) −  
VREF(CHOP=10)  
VREF chop step, trimmed  
-10  
-1.5  
100  
10  
VREF power supply sensitivity  
V3P3A = 3.0 to 3.6 V  
1.5  
mV/V  
kΩ  
ΔVREF / ΔV3P3A  
VREF_DIS = 1,  
VREF = 1.3 V to 1.7 V  
VREF input impedance  
VREF_CAL = 1,  
ILOAD = 10 µA, -10 µA  
VREF output impedance  
3.2  
kΩ  
VNOM (T) =VREF(22) + (T 22)TC1+ (T 22)2 TC2  
V
VNOM definition (see note 2)  
If temperature characterization trim information is available (71M6543H and 71M6543GH, 0.1%)  
VNOM temperature  
coefficients:  
(
)
35.091+0.01764∙TRIMT+1.587∙ TRIMBGB − TRIMBGD  
TC1 =  
µV/°C  
0.557 2.8 10ꢆ4 ∙ 푇푅퐼푀푇  
µV/°C2  
TC2 =  
VREF(T) deviation from  
VNOM(T) (see note 1):  
VREF(T) VNOM (T) 106  
-10  
+10  
ppm/°C  
VNOM (T)  
62  
If temperature characterization trim information is not available (71M6543F and 71M6543G , 0.5%)  
VNOM temperature  
coefficients:  
TC1 =  
TC2 =  
µV/°C  
275 4.95TRIMT  
0.557 + 0.00028TRIMT  
µV/°C2  
VREF(T) deviation from  
VNOM(T) (see note 1):  
VREF(T) VNOM (T) 106  
-40  
+40  
ppm/°C  
VNOM (T)  
62  
ppm/  
year  
VREF aging  
Notes:  
1. Guaranteed by design; not production tested.  
±25  
2. This relationship describes the nominal behavior of VREF at different temperatures, as  
governed by a second order polynomial of 1st and 2nd order coefficients TC1 and TC2.  
3. For the parameters in this table, unless otherwise specified, VREF_DIS = 0, PLL_FAST=1  
v1.2  
© 2008–2011 Teridian Semiconductor Corporation  
143  
 
 
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