Electrical Specifications
AC Electrical Specifications
Table 31: Reference Clock and Reset AC Timing Specifications
Description
Symbol
Min
Max
Units
Notes
TCLK_OUT Reference Clock
5
Frequency
F
166
60
MHz
%
TCLK_OUT
Clock duty cycle
TCLK_IN Reference Clock
Frequency
DC
40
3
4
1
TCLK_OUT
F
150
40
200
60
MHz
%
TCLK_IN
Clock duty cycle
Slew rate
DC
SR
TCLK_IN
TCLK_IN
TCLK_IN
0.7
V/ns
ps
Pk-Pk jitter
JR
200
Reset Specifications
Refer to Section 7, System Power Up and Reset
Settings.
Notes:
1. Slew rate is defined from 20% to 80% of the reference clock signal.
2. Defined on linear sweep or “Hershey’s Kiss” (US Patent 5,631,920) modulations.
3. The load is CL = 15 pF.
4. See Table 22, Reset Configuration, on page 52 for more details.
5. Relevant only when working in source synchronous device bus mode.
6. For additional information regarding configuring this clock, see the Serial Memory Interface
Control Register in the MV76100, MV78100, and MV78200 Functional Specification.
7. For additional information regarding configuring this clock, see the TDM Interface section in the
MV76100, MV78100, and MV78200 Functional Specifications.
Figure 6: TCLK_Out Reference Clock Test Circuit
Test Point
CL
Copyright © 2008 Marvell
December 6, 2008, Preliminary
MV-S104552-U0 Rev. D
Page 71
Document Classification: Proprietary Information
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
